Harald Neubauer

According to our database, Harald Neubauer authored at least 9 papers between 2001 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

A low-power continuous-time incremental 2nd-order-MASH ΣΔ-modulator for a CMOS imager.

Johannes Uhlig, René Schüffny, Harald Neubauer, Johann Hauer, Joachim Haase

Proceedings of the 16th IEEE International Conference on Electronics, 2009

Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing.

José Ángel Díaz-Madrid, Harald Neubauer, Hans Hauer, Ginés Doménech-Asensi, Ramón Ruiz Merino

Proceedings of the Design, Automation and Test in Europe, 2009

2008

A flexible algorithmic ADC for wireless sensor nodes.

I. E. Martin, Ana Rusu, Mohammed Ismail, Harald Neubauer, Johann Hauer

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

A 92dB-DR 13mW ΔΣ Modulator for Spaceborn Fluxgate Sensors.

Werner Magnes, Matthias Oberst, Aris Valavanoglou, Ulrich Reichold, Harald Neubauer, Hans Hauer, Peter Falkner

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2005

Performance analysis of high-speed MOS transistors with different layout styles.

Paula López, Matthias Oberst, Harald Neubauer, Johann Hauer, Diego Cabello

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Practical considerations on doughnut transistors design.

Paula López, Matthias Oberst, Harald Neubauer, Johann Hauer, Diego Cabello

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

1.8-V second-order ΣΔ modulator in 0.18-μm CMOS technology.

Juan M. Carrillo, Miguel A. Montecelo, Harald Neubauer, Hans Hauer, J. Francisco Duque-Carrillo

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2003

A 16-bit 60μW multi-bit ΣΔ modulator for portable ECG applications.

Jonny Johansson, Harald Neubauer, Hans Hauer

Proceedings of the ESSCIRC 2003, 2003

2001

A successive approximation A/D converter with 16 bit 200 kS/s in 0.6 μm CMOS using self calibration and low power techniques.

Harald Neubauer, Thomas Desel, Hans Hauer

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001