Hema Sai Kalluru

According to our database1, Hema Sai Kalluru authored at least 4 papers in 2021.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Transistor Sizing based PVT-Aware Low Power Optimization using Swarm Intelligence.
Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

PVT and Aging Degradation Invariant Automated Optimization Approach for CMOS Low-Power High-Performance VLSI Circuits.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm Intelligence.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Algorithm Driven Power-Timing Optimization Methodology for CMOS Digital Circuits Considering PVTA Variations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021


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