Zia Abbas
Orcid: 0000-0002-3747-3640
According to our database1,
Zia Abbas
authored at least 51 papers
between 2012 and 2024.
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Bibliography
2024
A 0.8-V, 593-pA Trim-free Duty-cycled All CMOS Current Reference for Ultra-Low Power IoT Applications.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
2023
Integr., November, 2023
Approximate Toom-Cook FFT with sparsity aware error tuning in a shared memory architecture.
Integr., March, 2023
Enhancing ML model accuracy for Digital VLSI circuits using diffusion models: A study on synthetic data generation.
CoRR, 2023
CoRR, 2023
A 250pA, Gate-Leakage Based Trimming Free Current Reference, from -55°C to 150°C for Lower Power IoT Applications.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
A 37nW, All-in-One Trim-Free Voltage/Current Reference Without Using Resistors and Amplifiers.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
A 0.5V, pico-watt, 0.06%/V / 0.03%/V low supply sensitive current/voltage reference without using amplifiers and resistors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
A 7 nW, 1 kHz, -40-170°C Relaxation Oscillator with Switch-Leakage Compensation for Low-Power High-Temperature IoT Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
A 2.3nW Gate-Leakage Based Sub-Bandgap Voltage Reference with Line Sensitivity of 0.0066%/V from -40°C to 150°C for Low-Power IoT Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
A 162nW, 0.845pJ/step Resistance-to-Digital Converter for Miniature Battery-Powered Sensing Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
An 18.5nW, 62.9dB PSRR, Switched-Capacitor Bandgap Voltage Reference using Low Power Clock Generator Circuit for Biomedical Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Design and Fabrication of Microfluidic Chip for Temperature Control Applications in Biomedical.
Proceedings of the 16th International Conference on Sensing Technology, 2023
A Label-Free Low-Cost Radio Frequency Driven Noninvasive Lab-on-Chip System for Creatinine Detection.
Proceedings of the 16th International Conference on Sensing Technology, 2023
A High PSRR CMOS Voltage and Current Reference in One Circuit Without Amplifier for Low Power Applications.
Proceedings of the International Conference on Microelectronics, 2023
Proceedings of the International Conference on Computer and Applications, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A 180<sup>o</sup> Phase Shift Biasing Technique for Realizing High PSRR in Low Power Temperature Sensors.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022
Fast and efficient ResNN and Genetic optimization for PVT aware performance enhancement in digital circuits.
Proceedings of the 2022 International Symposium on VLSI Design, Automation and Test, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
A 0.85V Supply, High PSRR CMOS Voltage Reference without Resistor and Amplifier for Ultra-Low Power Applications.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
PVT and Aging Degradation Invariant Automated Optimization Approach for CMOS Low-Power High-Performance VLSI Circuits.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm Intelligence.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Algorithm Driven Power-Timing Optimization Methodology for CMOS Digital Circuits Considering PVTA Variations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
3.75ppm/<sup>°</sup>C, -91dB PSRR, 27nW, 0.9V PVT Invariant Voltage Reference for Implantable Biomedical Applications.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
A Compact, Power Efficient, Self-Adaptive and PVT Invariant CMOS Relaxation Oscillator.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Low Quiescent Current, Capacitor-Less LDO with Adaptively Biased Power Transistors and Load Aware Feedback Resistance.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
67ppm/°C, 66nA PVT Invariant Curvature Compensated Current Reference for Ultra-Low Power Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
An Efficient Gradient Boosting Approach for PVT Aware Estimation of Leakage Power and Propagation Delay in CMOS/FinFET Digital Cells.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A 47nW, 0.7-3.6V wide Supply Range, Resistor Based Temperature Sensor for IoT Applications.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Statistical Variation Aware Leakage and Total Power Estimation of 16 nm VLSI Digital Circuits Based on Regression Models.
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019
Robust Transistor Sizing for Improved Performances in Digital Circuits using Optimization Algorithms.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
A High PSRR, Stable CMOS Current Reference using Process Insensitive TC of Resistance for Wide Temperature Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
PVT Variations Aware Robust Transistor Sizing for Power-Delay Optimal CMOS Digital Circuit Design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Memetic Algorithm Based PVT Variation-Aware Robust Transistor Sizing Scheme for Power-Delay Optimal Digital Standard Cell Design.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
A Highly Accurate Machine Learning Approach to Modelling PVT Variation Aware Leakage Power in FinFET Digital Circuits.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
2018
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018
Voltage Level Adapter Design for High Voltage Swing Applications in CMOS Differential Amplifier.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018
LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018
2016
Int. J. Circuit Theory Appl., 2016
2014
A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2014
Impact of technology scaling on leakage power in nano-scale bulk CMOS digital standard cells.
Microelectron. J., 2014
2013
Design centering/yield optimization of power aware band pass filter based on CMOS current controlled current conveyor (CCCII+).
Microelectron. J., 2013
2012
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012