Heng Zhang
Orcid: 0009-0005-3618-5849Affiliations:
- Nanjing University, School of Integrated Circuits / School of Electronic Science and Engineering, Qixia, China
- Nanjing University, Interdisciplinary Research Center for Future Intelligent Chips (Chip-X), Suzhou, China
According to our database1,
Heng Zhang authored at least 7 papers
between 2024 and 2026.
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Bibliography
2026
A 1.1 μJ/Inference Binary Spiking Neural Network Accelerator for DVS Gesture Recognition.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2026
Lightweight Multi-View EEG Seizure Detection with a Two-Stage Low-Power BFP FFT-NN Accelerator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2025
FAS-NoC: A Real-Time Fused Approximation Scheme Coordinating Communication and Computation for NoC-Based NN Accelerators.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2025
HengNet: An Ultra-lightweight Model with Two-level Reuse Algorithm for Seizure Detection and Prediction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
TTNNM: Thermal- and Traffic-Aware Neural Network Mapping on 3D-NoC-based Accelerator.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
Four-class EEG Classification for Seizure Prediction and Detection Using a Lightweight CNN-LSTM.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2024