Hideki Kamitsuna

According to our database, Hideki Kamitsuna authored at least 3 papers between 1992 and 2011.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of four.

2011

An Injection-Controlled 10-Gb/s Burst-Mode CDR Circuit for a 1G/10G PON System.

Hiroaki Katsurai, Hideki Kamitsuna, Hiroshi Koizumi, Jun Terada, Yusuke Ohtomo, Tsugumichi Shibata

IEICE Trans. Electron., 2011

2006

Low-power InP-HEMT switch ICs integrating miniaturized 2×2 switches for 10-Gb/s systems.

Hideki Kamitsuna, Yasuro Yamane, Masami Tokumitsu, Hirohiko Sugahara, Masahiro Muraguchi

IEEE J. Solid State Circuits, 2006

1992

A 15-GHz monolithic low-phase-noise VCO using AlGaAs/GaAs HBT technology.

Yoshiki Yamauchi, Hideki Kamitsuna, Masashi Nakatsugawa, Hiroshi Ito, Masahiro Muraguchi, Kazuo Osafune

IEEE J. Solid State Circuits, October, 1992