Hidenobu Harasaki

According to our database, Hidenobu Harasaki authored at least 12 papers between 1986 and 1999.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

1999

Memory Compression Method Considering Memory Bandwidth for Hdtv Decoder Lsis.

Junji Tajime, Tetsuro Takizawa, Satoshi Nogaki, Hidenobu Harasaki

Proceedings of the 1999 International Conference on Image Processing, 1999

High performance and cost effective memory architecture for an HDTV decoder LSI.

Tetsuro Takizawa, Junji Tajime, Hidenobu Harasaki

Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

A realtime software MPEG transcoder using a novel motion vector reuse and a SIMD optimization techniques.

Yuzo Senda, Hidenobu Harasaki

Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1996

Theoretical background and improvement of a simplified half-pel motion estimation.

Yuzo Senda, Hidenobu Harasaki, Mitsuharu Yano

Proceedings of the Proceedings 1996 International Conference on Image Processing, 1996

1995

A simplified motion estimation using an approximation for the MPEG-2 real-time encoder.

Yuzo Senda, Hidenobu Harasaki, Mitsuharu Yano

Proceedings of the 1995 International Conference on Acoustics, 1995

1991

A real-time HDTV signal processor: HD-VSP.

Ichiro Tamitani, Hidenobu Harasaki, Takao Nishitani

IEEE Trans. Circuits Syst. Video Technol., 1991

1990

Background separation/filtering for videophone applications.

Hidenobu Harasaki, Mitsuharu Yano, Takao Nishitani

Proceedings of the 1990 International Conference on Acoustics, 1990

A real-time software programmable processor for HDTV and stereo scope signals.

Takao Nishitani, Ichiro Tamitani, Hidenobu Harasaki, Mitsuharu Yano

Proceedings of the Application Specific Array Processors, 1990

1989

Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP.

Takao Nishitani, Ichiro Tamitani, Hidenobu Harasaki, Yukio Endo, Toshiyuki Kanou, Koichi Kikuchi

J. VLSI Signal Process., 1989

1988

A single-board video signal processor module employing newly developed LSI devices.

Hidenobu Harasaki, Ichiro Tamitani, Yukio Endo, Takao Nishitani, Masakatsu Yamashina, Tadayoshi Enomoto, Norio Suzuki

IEEE J. Sel. Areas Commun., 1988

1987

Realtime video signal processor module.

Hidenobu Harasaki, Ichiro Tamitani, Yukio Endo, Takao Nishitani, Masakatsu Yamashina, Tadayoshi Enomoto, Norio Suzuki

Proceedings of the IEEE International Conference on Acoustics, 1987

1986

Video signal processor configuration by multiprocessor approach.

Takao Nishitani, Ichiro Tamitani, Hidenobu Harasaki, Masakatsu Yamashina, Tadayoshi Enomoto

Proceedings of the IEEE International Conference on Acoustics, 1986