Hiroaki Ishihara

According to our database, Hiroaki Ishihara authored at least 11 papers between 2005 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

19.4 A Digital-Feedback Active-Gate-Driver IC for 600A 1200V SiC MOSFETs Supporting High-and Low-Side Drive with Simultaneous ${\text{dV}}_{\text{ds}}$/dt Control and ${\mathrm{V}}_{\text{ds}}$ Surge Suppression Enabled by Miller Capacitance Calibration.

Shusuke Kawai, Kohei Horii, Koutaro Miyazaki, Yuto Bushimata, Satoshi Takaya, Hiroaki Ishihara

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

A Binary-Weighted Switched-Capacitor Gate Driver IC for Overcoming Trade-Offs Between Driving Loss and Delay Time with Gate-Current Feedback Achieving 85% Driving Loss Reduction.

Kohei Horii, Koutaro Miyazaki, Shusuke Kawai, Hiroaki Ishihara

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2020

18.7 A DC to 35MHz Fully Integrated Single-Power-Supply Isolation Amplifier for Current- and Voltage-Sensing Front-Ends of Power Electronics.

Satoshi Takaya, Hiroaki Ishihara, Kohei Onizuka

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

18.8 A Fully-Generic-Process Galvanic Isolator for Gate Driver with 123mW 23% Power Transfer and Full-Triplex 21/14/0.5Mb/s Bidirectional Communication Utilizing Reference-Free Dual-Modulation FSK.

Hiroaki Ishihara, Kohei Onizuka

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2012

A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion.

Kohei Onizuka, Hiroaki Ishihara, Masahiro Hosoya, Shigehito Saigusa, Osamu Watanabe, Shoji Otaka

IEEE J. Solid State Circuits, 2012

2011

A 130μA wake-up receiver SoC in 0.13μm CMOS for reducing standby power of an electric appliance controlled by an infrared remote controller.

Hiroaki Ishihara, Toshiyuki Umeda, Katsuya Ohno, Shigeyasu Iwata, Fumi Moritsuka, Tetsuro Itakura, Manabu Ishibe, Keijiro Hijikata, Yasunori Maki

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller.

Kohei Onizuka, Hiroaki Ishihara, Masahiro Hosoya, Shigehito Saigusa, Osamu Watanabe, Shoji Otaka

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010

A 10-MHz Signal Bandwidth Cartesian Loop Transmitter Capable of Off-Chip PA Linearization.

Hiroaki Ishihara, Masahiro Hosoya, Shoji Otaka, Osamu Watanabe

IEEE J. Solid State Circuits, 2010

A 10MHz signal bandwidth Cartesian-loop transmitter capable of off-chip PA linearization.

Hiroaki Ishihara, Masahiro Hosoya, Shoji Otaka, Osamu Watanabe

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008

0.13 μm CMOS Cartesian loop transmitter IC with fast calibration and switching scheme from opened to closed loop.

Shoji Otaka, Masahiro Hosoya, Hiroaki Ishihara, Toru Hashimoto, Yuta Araki

Proceedings of the ESSCIRC 2008, 2008

2005

A widely tunable Gm-C filter using tail current offset in two differential pairs.

Tomoyuki Tanaka, Sungwoo Cha, Shinsaku Shimizu, Tsukasa Ida, Hiroaki Ishihara, Toshimasa Matsuoka, Kenji Taniguchi, Akashi Sugimori, Hiroki Hihara

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005