Kohei Onizuka

According to our database1, Kohei Onizuka authored at least 27 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
An Active Slew Rate Control Gate Driver IC With Robust Discrete-Time Feedback Technique for 600-V Superjunction MOSFETs.
IEEE J. Solid State Circuits, February, 2023

2021
A Tile-based 8×8 Triangular Grid Array Beamformer for 5.7 GHz Microwave Power Transmission.
Proceedings of the IEEE Radio and Wireless Symposium, 2021

A 5.7GHz RF Wireless Power Transfer Receiver Using 84.5% Efficiency 12V SIDO Buck-Boost DC-DC Converter with Internal Power Supply Mode.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
18.7 A DC to 35MHz Fully Integrated Single-Power-Supply Isolation Amplifier for Current- and Voltage-Sensing Front-Ends of Power Electronics.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

18.8 A Fully-Generic-Process Galvanic Isolator for Gate Driver with 123mW 23% Power Transfer and Full-Triplex 21/14/0.5Mb/s Bidirectional Communication Utilizing Reference-Free Dual-Modulation FSK.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
An 8 Bit 12.4 TOPS/W Phase-Domain MAC Circuit for Energy-Constrained Deep Learning Accelerators.
IEEE J. Solid State Circuits, 2019

A 4.5V/ns Active Slew-Rate-Controlling Gate Driver with Robust Discrete-Time Feedback Technique for 600V Superjunction MOSFETs.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer.
IEEE J. Solid State Circuits, 2018

PhaseMAC: A 14 TOPS/W 8bit GRO Based Phase Domain MAC Circuit for in-Sensor-Computed Deep Learning Accelerators.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018


A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017
Efficient energy beamforming for multi-device microwave wireless power transfer under Tx/Rx power constraints.
Proceedings of the 28th IEEE Annual International Symposium on Personal, 2017

F2: High-performance frequency generation for wireless and wireline systems.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Session 2 overview: Power amplifiers.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015
Head ballistocardiogram based on wireless multi-location sensors.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

2014
Polar Antenna Impedance Detection and Tuning for Efficiency Improvement in a 3G/4G CMOS Power Amplifier.
IEEE J. Solid State Circuits, 2014

3.1 polar antenna impedance detection and tuning for efficiency improvement in a 3G/4G CMOS Power Amplifier.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A new wave of CMOS power amplifier innovations: Fusing digital and analog techniques with large signal RF operations.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
A 1.8GHz linear CMOS power amplifier with supply-path switching scheme for WCDMA/LTE applications.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion.
IEEE J. Solid State Circuits, 2012

A 28.3 mW PA-Closed Loop for Linearity and Efficiency Improvement Integrated in a + 27.1 dBm WCDMA CMOS Power Amplifier.
IEEE J. Solid State Circuits, 2012

A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique.
Proceedings of the Symposium on VLSI Circuits, 2012

A 28.3mW PA-closed loop for linearity and efficiency improvement integrated in a +27.1dBm WCDMA CMOS power amplifier.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2007
Stacked-Chip Implementation of On-Chip Buck Converter for Distributed Power Supply System in SiPs.
IEEE J. Solid State Circuits, 2007

2006
$V_rm DD$-Hopping Accelerators for On-Chip Power Supply Circuit to Achieve Nanosecond-Order Transient Time.
IEEE J. Solid State Circuits, 2006

Chip-to-Chip Inductive Wireless Power Transmission System for SiP Applications.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006


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