Hiromi Hiraishi

According to our database1, Hiromi Hiraishi authored at least 15 papers between 1981 and 2000.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2000
Yet more image computations for SMV, the symbolic model verifier.
Syst. Comput. Jpn., 2000

Verification of deadlock free property of high level robot control.
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

1996
Formal Verification Of Self-Testing Properties Of Combinational Circuits.
Proceedings of the 5th Asian Test Symposium (ATS '96), 1996

1995
Towards Verification of Bit-Slice Circuits-Time-Space Modal Model Checking Approach-.
IEICE Trans. Inf. Syst., 1995

Temporal Verification of Real-Time Systems.
IEICE Trans. Inf. Syst., 1995

Verification of the Futurebus+ Cache Coherence Protocol.
Formal Methods Syst. Des., 1995

1994
Computing Quantitative Characteristics of Finite-State Real-Time Systems.
Proceedings of the 15th IEEE Real-Time Systems Symposium (RTSS '94), 1994

1992
Infinity-Regular Temporal Logic and its Model Checking Problem.
Theor. Comput. Sci., 1992

Design Verification of a Microprocessor Using Branching Time Regular Temporal Logic.
Proceedings of the Computer Aided Verification, Fourth International Workshop, 1992

1991
Vectorized Symbolic Model Checking of Computation Tree Logic for Sequential Machine Verification.
Proceedings of the Computer Aided Verification, 3rd International Workshop, 1991

Formal Verification of Speed-Dependent Asynchronous Cicuits Using Symbolic Model Checking of branching Time Regular Temporal Logic.
Proceedings of the Computer Aided Verification, 3rd International Workshop, 1991

1990
Vectorized Model Checking for Computation Tree Logic.
Proceedings of the Computer Aided Verification, 2nd International Workshop, 1990

Branching Time Regular Temporal Logic for Model Checking with Linear Time Complexity.
Proceedings of the Computer Aided Verification, 2nd International Workshop, 1990

1988
Algebraic Specification of Parallel Systems Based on Binary Relations between Events.
Syst. Comput. Jpn., 1988

1981
Data Compression of the Kanji Character Patterns Digitized on the Hexagonal Mesh.
IEEE Trans. Pattern Anal. Mach. Intell., 1981


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