Hiromichi Yamada

According to our database, Hiromichi Yamada authored at least 8 papers between 1994 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Representations of a fixed-point subalgebra of a class of lattice vertex operator algebras by an automorphism of order three.

Kenichiro Tanabe, Hiromichi Yamada

Eur. J. Comb., 2009

2007

A Cost-Effective Dependable Microcontroller Architecture with Instruction-Level Rollback for Soft Error Recovery.

Teruaki Sakata, Teppei Hirotsu, Hiromichi Yamada, Takeshi Kataoka

Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007

2006

Low-Latency Superscalar and Small-Code-Size Microcontroller Core for Automotive, Industrial, and PC-Peripheral Applications.

Yasuo Sugure, Seiji Takeuchi, Yuichi Abe, Hiromichi Yamada, Kazuya Hirayanagi, Akihiko Tomita, Kesami Hagiwara, Takeshi Kataoka, Takanori Shimura

IEICE Trans. Electron., 2006

1997

A practical approach to instruction-based test generation for functional modules of VLSI processors.

Kazumi Hatayama, Kazunori Hikone, Takeshi Miyazaki, Hiromichi Yamada

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

1996

2.5 V CMOS circuit techniques for a 200 MHz superscalar RISC processor.

Fumio Murabayashi, Tatsumi Yamauchi, Hiromichi Yamada, Takahiro Nishiyama, Kotaro Shimamura, Shigeya Tanaka, Takashi Hotta, Teruhisa Shimizu, Hideo Sawamoto

IEEE J. Solid State Circuits, 1996

1995

A 13.3ns double-precision floating-point ALU and multiplier.

Hiromichi Yamada, Takashi Hotta, Takahiro Nishiyama, Fumio Murabayashi, Tatsumi Yamauchi, Hideo Sawamoto

Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994

A 120-MHz BiCMOS superscalar RISC processor.

Shigeya Tanaka, Takashi Hotta, Fumio Murabayashi, Hiromichi Yamada, Shoji Yoshida, Kotaro Shimamura, Koyo Katsura, Tadaaki Bandoh, Koichi Ikeda, Kenji Matsubara, Kouji Saitou, Tetsuo Nakano, Teruhisa Shimizu, Ryuichi Satomura

IEEE J. Solid State Circuits, April, 1994

3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor.

Fumio Murabayashi, Takashi Hotta, Shigeya Tanaka, Tatsumi Yamauchi, Hiromichi Yamada, Tetsuo Nakano, Yutaka Kobayashi, Tadaaki Bandoh

IEEE J. Solid State Circuits, March, 1994