Hiroshi Miyanaga

According to our database1, Hiroshi Miyanaga authored at least 3 papers between 1986 and 1991.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1991
A real-time 256×256 point two-dimensional FFT single-chip processor.
Proceedings of the 1991 International Conference on Acoustics, 1991

1987
High-Speed Time Division Switch for 32-Mbit/s Bearer Rate Signals.
IEEE J. Sel. Areas Commun., 1987

1986
A Novel Concept for High-Speed Time Switch Approaching Memory Read Cycle Limit.
IEEE Trans. Commun., 1986


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