Homa Aghilinasab

Orcid: 0000-0003-1762-6985

According to our database1, Homa Aghilinasab authored at least 4 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Chapter Two - An efficient DVS scheme for on-chip networks.
Adv. Comput., 2022

2020
Dynamic Memory Bandwidth Allocation for Real-Time GPU-Based SoC Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2016
Reducing Power Consumption of GPGPUs Through Instruction Reordering.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

2015
An efficient DVS scheme for on-chip networks using reconfigurable Virtual Channel allocators.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015


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