Hongchin Lin

Orcid: 0000-0003-2507-8616

According to our database1, Hongchin Lin authored at least 20 papers between 1999 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2016
High-Performance Regulated Charge Pump with an Extended Range of Load Current.
IEICE Trans. Electron., 2016

2015
Energy-Efficient and Area-Efficient QC-LDPC with RS Decoders Using 2M-LMSA.
J. Circuits Syst. Comput., 2015

2014
High-voltage tolerant circuit design for fully CMOS compatible multiple-time programmable memories.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Design of an Area-Efficient High-Throughput Shift-Based LDPC decoder.
J. Circuits Syst. Comput., 2013

Area-efficient high-throughput parallel scramblers using generalized algorithms.
IEICE Electron. Express, 2013

2012
An analysis of output ripples for PMOS charge pumps and design methodology.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011
A low-voltage band-gap reference circuit with second-order analyses.
Int. J. Circuit Theory Appl., 2011

2010
Efficient high-throughput architectures for high-speed parallel scramblers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2007
A Multilevel Read and Verifying Scheme for Bi-NAND Flash Memories.
IEEE J. Solid State Circuits, 2007

2006
A Simple Subthreshold CMOS Voltage Reference Circuit With Channel- Length Modulation Compensation.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

2005
A novel high-speed sense amplifier for Bi-NOR flash memories.
IEEE J. Solid State Circuits, 2005

A sub-1V bandgap reference circuit using subthreshold current.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A new dual pumping circuit without body effects for low supply voltage.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
A flexible design of a decision feedback equalizer and a novel CCK technique for wireless LAN systems.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Design of Modified Four-Phase CMOS Charge Pumps for Low-Voltage Flash Memories.
J. Circuits Syst. Comput., 2002

An 1 V rail-rail low-power CMOS op-amp.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
A low-power 3-phase half rail pass-gate differential logic.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

New four-phase generation circuits for low-voltage charge pumps.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
A simple high-speed low current comparator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Novel high positive and negative pumping circuits for low supply voltage.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999


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