Hongjiang Song

According to our database1, Hongjiang Song authored at least 16 papers between 2006 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Differential Capacitive Readout Circuit Using Oversampling Successive Approximation Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2016
A portable impedance-based electrochemical measurement device.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
A point of care electrochemical impedance spectroscopy device.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

2014
A CMOS self-powered monolithic light direction sensor with SAR ADC.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

A neural rehabilitation chip with neural recording, peak detection, spike rate counter, and biphasic neural stimulator.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

A self-powered 2-dimensional motion detection chip.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

CMOS-based on-chip electrochemical sensor.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

2010
8Gbps high-speed I/O transmitter with scalable speed, swing and equalization levels.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Jitter transfer function model and VLSI jitter filter circuits.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Amorphous silicon 7 bit digital to analog converter on PEN.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2008
VLSI passive switched capacitor signal processing circuits: Circuit architecture, closed form modeling and applications.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Novel mixed domain VLSI signal processing circuits for high performance, low power and area penalty SOC signal processing.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

1.5V 0.5mW 2MSPS 10B DAC with rail-to-rail output in 0.13mum CMOS technology.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

2006
I/Q-Channel Mismatch Transfer and Amplification Effects and Applications to the Measurement and Calibration of Integrated VLIF RF Receivers.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Architecture and Implementation of Power and Area Efficient Receiver Equalization Circuit for High-Speed Serial Data Communication.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

A General Method to VLSI Polyphase Filter Analysis and Design for Integrated RF Applications.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006


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