Bertan Bakkaloglu
Orcid: 0000-0003-4135-7367Affiliations:
- Arizona State University, Tempe, AZ, USA
- Oregon State University (PhD 1995)
According to our database1,
Bertan Bakkaloglu
authored at least 92 papers
between 1994 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2018, "For contributions to radio frequency circuits".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
5-GHz Injection-Locked Delay Cell With 10-25 ns Adjustable Group Delay in SiGe BiCMOS.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
2023
A 95.2% Efficiency DC-DC Boost Converter Using Peak Current Fast Feedback Control (PFFC) for Improved Load Transient Response.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2023
2022
An Active EMI Cancellation Technique Achieving a 25-dB Reduction in Conducted EMI of LIN Drivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A 5-GHz Injection-Locked Delay Cell with 10-25 ns Adjustable Group-Delay in a 130-nm SiGe BiCMOS Technology.
Proceedings of the 2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2022
2020
A 5.6 μ A Wide Bandwidth, High Power Supply Rejection Linear Low-Dropout Regulator With 68 dB of PSR Up To 2 MHz.
IEEE J. Solid State Circuits, 2020
32.5 A Scalable and PCB-Friendly Daisy-Chain Approach to Parallelize LDO Regulators with 2.613% Current-Sharing Accuracy Using Dynamic Element Matching for Integrated Current Sensing.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
Low-Power/Low-Voltage Integrated CMOS Sense Resistor-Free Analog Power/Current Sensor Compatible With High-Voltage Switching DC-DC Converter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A 50-V Isolation, 100-MHz, 50-mW Single-Chip Junction Isolated DC-DC Converter With Self-Tuned Maximum Power Transfer Frequency.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Wideband Hybrid Envelope Tracking Modulator With Hysteretic-Controlled Three-Level Switching Converter and Slew-Rate Enhanced Linear Amplifier.
IEEE J. Solid State Circuits, 2019
A 91%-Efficiency Envelope-Tracking Modulator Using Hysteresis-Controlled Three-Level Switching Regulator and Slew-Rate-Enhanced Linear Amplifier for LTE-80MHz Applications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
ACM Trans. Design Autom. Electr. Syst., 2018
ACM Trans. Design Autom. Electr. Syst., 2018
Online Built-In Self-Test of High Switching Frequency DC-DC Converters Using Model Reference Based System Identification Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
A 1.24 $\mu$ A Quiescent Current NMOS Low Dropout Regulator With Integrated Low-Power Oscillator-Driven Charge-Pump and Switched-Capacitor Pole Tracking Compensation.
IEEE J. Solid State Circuits, 2018
Sense resistor-free analog power sensor for boost converter with 14.1% gain error and 9.4% offset error.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
2017
A 50-mA 99.2% Peak Current Efficiency, 250-ns Settling Time Digital Low-Dropout Regulator With Transient Enhanced PI Controller.
IEEE Trans. Very Large Scale Integr. Syst., 2017
A 100-mA, 99.11% Current Efficiency, 2-mV<sub>pp</sub> Ripple Digitally Controlled LDO With Active Ripple Suppression.
IEEE Trans. Very Large Scale Integr. Syst., 2017
A 6 A, 93% Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter With ±1.5% Frequency and ±3.6% Current-Sharing Error.
IEEE J. Solid State Circuits, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
2015
Built-in Self-Calibration and Digital-Trim Technique for 14-Bit SAR ADCs Achieving ±1 LSB INL.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Enabling unauthorized RF transmission below noise floor with no detectable impact on primary communication performance.
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
Fully-integrated switched-capacitor voltage regulator with on-chip current-sensing and workload optimization in 32nm SOI CMOS.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
A 14.8μVRMS integrated noise output capacitor-less low dropout regulator with a switched-RC bandgap reference.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
2014
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
A built-in self-test technique for load inductance and lossless current sensing of DC-DC converters.
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
2013
Programmable ANalog Device Array (PANDA): A Methodology for Transistor-Level Analog Emulation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
A 90-nm CMOS 5-GHz Ring-Oscillator PLL With Delay-Discriminator-Based Active Phase-Noise Cancellation.
IEEE J. Solid State Circuits, 2013
Fast transient digitally controlled buck regulator with inductor current slew-rate boost.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
An integrated MESFET voltage follower LDO for high power and PSR RF and analog applications.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Trans. Biomed. Circuits Syst., 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Dynamic calibration of feedback DAC non-linearity for a 4<sup>th</sup> order CT sigma delta for digital hearing aids.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
A digitally controlled DC-DC buck converter with lossless load-current sensing and BIST functionality.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Programmable analog device array (PANDA): a platform for transistor-level analog reconfigurability.
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
A 20-MS/s to 40-MS/s Reconfigurable Pipeline ADC Implemented With Parallel OTA Scaling.
IEEE Trans. Circuits Syst. II Express Briefs, 2010
Correction to "A 1 MHz Bandwidth, 6 GHz 0.18 μ m CMOS Type-I Delta Sigma Fractional-N Synthesizer for WiMAX Applications" [Dec 09 3244-3252].
IEEE J. Solid State Circuits, 2010
A 300mA 14mV-ripple digitally controlled buck converter using frequency domain ΔΣ ADC and hybrid PWM generator.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
IEEE Trans. Biomed. Circuits Syst., 2009
Combined Linear and Δ-Modulated Switch-Mode PA Supply Modulator for Polar Transmitters.
IEEE J. Solid State Circuits, 2009
IEEE J. Solid State Circuits, 2009
A 1 MHz Bandwidth, 6 GHz 0.18 µm CMOS Type-I ΔΣ Fractional-NSynthesizer for WiMAX Applications.
IEEE J. Solid State Circuits, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the 16th International Conference on Digital Signal Processing, 2009
Proceedings of the 27th International Conference on Computer Design, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
A CMOS Low Noise, Chopper Stabilized Low-Dropout Regulator With Current-Mode Feedback Error Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
A fully integrated pulsed-LASER time-of-flight measurement system with 12ps single-shot precision.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
Wirel. Commun. Mob. Comput., 2007
A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends.
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
A Self-Calibrated On-Chip Phase-Noise Measurement Circuit With -75 dBc Single-Tone Sensitivity at 100 kHz Offset.
IEEE J. Solid State Circuits, 2007
Comput. Stand. Interfaces, 2007
Combined Linear and Δ-Modulated Switched-Mode PA Supply Modulator for Polar Transmitters.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
A Self-Calibrated On-chip Phase-Noise-Measurement Circuit with -75dBc Single-Tone Sensitivity at 100kHz Offset.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
A low noise buck converter with a fully integrated continuous time ΣΔ modulated feedback controller.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2006
A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90-nm digital CMOS process.
IEEE J. Solid State Circuits, 2006
Fully-Integrated, Programmable, Polar-Modulated Class E Power Amplifier.
Proceedings of the Sixth IASTED International Multi-Conference on Wireless and Optical Communications: Conference on Communication Systems and Applications, 2006
I/Q-Channel Mismatch Transfer and Amplification Effects and Applications to the Measurement and Calibration of Integrated VLIF RF Receivers.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
A Multi-Stage Interleaved Synchronous Buck Converter with Integrated Output Filter in a 0.18µ SiGe process.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A 65MHZ switching rate, two-stage interleaved synchronous buck converter with fully integrated output filter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A Low 1/f Noise CMOS Low-Dropout Regulator with Current-Mode Feedback Buffer Amplifier.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Ann. des Télécommunications, 2004
2003
Proceedings of the Integrated Circuit and System Design, 2003
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003
2002
An all-digital programmable digitally-controlled-oscillator (DCO) for digital wireless applications.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
1997
Parallel Algorithms Appl., 1997
1995
1994
IEEE Trans. Autom. Control., 1994
Parallel Algorithms Appl., 1994