Hongjin Liu

Orcid: 0000-0002-3900-3036

According to our database1, Hongjin Liu authored at least 19 papers between 2002 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
Hardware Trojan Detection Methods for Gate-Level Netlists Based on Graph Neural Networks.
IEEE Trans. Computers, May, 2025

Genetic algorithm optimized frequency-domain convolutional blind source separation for multiple leakage locations in water supply pipeline.
Comput. Aided Civ. Infrastructure Eng., April, 2025

Corrections to "GNN-Based Hardware Trojan Detection at Register Transfer Level Leveraging Multiple-Category Features".
IEEE Trans. Very Large Scale Integr. Syst., March, 2025

GNN-Based Hardware Trojan Detection at Register Transfer Level Leveraging Multiple-Category Features.
IEEE Trans. Very Large Scale Integr. Syst., March, 2025

Adaptive Water Supply Pipe Leakage Localization Under Low SNR Based on GWO-VMD-CC.
IEEE Trans. Instrum. Meas., 2025

2024
Multi-scale skeleton simplification graph convolutional network for skeleton-based action recognition.
IET Comput. Vis., October, 2024

ReBEC: A replacement-based energy-efficient fault-tolerance design for associative caches.
Future Gener. Comput. Syst., 2024

2023
C-DMR: a cache-based fault-tolerant protection method for register file.
J. Supercomput., March, 2023

An Efficient Fault-Tolerant Protection Method for L0 BTB.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2023

A unioned graph neural network based hardware Trojan node detection.
IEICE Electron. Express, 2023

2021
Design and Application of English Grammar Intelligent Question Bank System.
Sci. Program., 2021

scSpark<sup>XMBD</sup>: High-Performance scRNA-seq Data Processing with Spark.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2021

2019
Design and Characterization of SEU Hardened Circuits for SRAM-Based FPGA.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2016
Design and Comparison of High-Reliable Radiation-Hardened Flip-Flops Under SMIC 40nm Process.
J. Circuits Syst. Comput., 2016

2013
Integrating Separation Logic with PPTL.
Proceedings of the Structured Object-Oriented Formal Language and Method, 2013

HHC: Hierarchical hardware checkpointing to accelerate fault recovery for SRAM-based FPGAs.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012
Off-path leakage power aware routing for SRAM-based FPGAs.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Exploiting Free LUT Entries to Mitigate Soft Errors in SRAM-based FPGAs.
Proceedings of the 20th IEEE Asian Test Symposium, 2011

2002
The Flux-Oriented Control of an Induction Machine Utilizing an Online Controller Parameter Adaptation Scheme.
Proceedings of the AI 2002: Advances in Artificial Intelligence, 2002


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