Haigang Yang

According to our database1, Haigang Yang authored at least 50 papers between 2005 and 2019.

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Bibliography

2019
Design and Characterization of SEU Hardened Circuits for SRAM-Based FPGA.
IEEE Trans. VLSI Syst., 2019

A Sub-1 V Temperature-Insensitive-PSR Bandgap Reference with Complementary Loop Locking.
Journal of Circuits, Systems, and Computers, 2019

A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition.
Integration, 2019

A hybrid Sigma-Delta modulator with reusable SAR quantizer.
IEICE Electronic Express, 2019

A High Energy-Efficiency FPGA-Based LSTM Accelerator Architecture Design by Structured Pruning and Normalized Linear Quantization.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Exploring Resource-Efficient Acceleration Algorithm for Transposed Convolution of GANs on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2019

2018
A 790 nW Low-Noise Instrumentation Amplifier for Bio-Sensing Based On Gm-RSC Structure.
Journal of Circuits, Systems, and Computers, 2018

A 0.5 to 1.7 Gbps PI-CDR with a Wide Frequency-Tracking Range.
Journal of Circuits, Systems, and Computers, 2018

A Self-adaptation Method of Fitting Convolutional Neural Network into FPGA: Abstract Only).
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2017
NAND-NOR: A Compact, Fast, and Delay Balanced FPGA Logic Element.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016
A Computationally Efficient Reconfigurable FIR Filter Architecture Based on Coefficient Occurrence Probability.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

FPGA High-level Synthesis versus Overlay: Comparisons on Computation Kernels.
SIGARCH Computer Architecture News, 2016

2015
A 5.8-GHz Wideband TSPC Divide-by-16/17 Dual Modulus Prescaler.
IEEE Trans. VLSI Syst., 2015

A Multiphase DLL With a Novel Fast-Locking Fine-Code Time-to-Digital Converter.
IEEE Trans. VLSI Syst., 2015

A 1.3μW 0.7μVRMS chopper current-reuse instrumentation amplifier for EEG applications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A technology mapper for depth-constrained FPGA logic cells.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014
Successive approximation time-to-digital converter based on vernier charging method.
IEICE Electronic Express, 2014

A highly-integrated wireless configuration circuit for FPGA chip.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Size aware placement for island style FPGAs.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

A semi-supervised modeling approach for performance characterization of FPGA architectures.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Exploring architecture parameters for dual-output LUT based FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

A survey of open source processors for FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Revisiting and-inverter cones.
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

A -115dB PSRR CMOS bandgap reference with a novel voltage self-regulating technique.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

A programmable wireless platform for biomedical signal acquisition.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

2013
Analysis and Design of a 3rd Order Velocity-Controlled Closed-Loop for MEMS Vibratory Gyroscopes.
Sensors, 2013

A Range-Extended and Area-Efficient Time-to-Digital Converter Utilizing Ring-Tapped Delay Line.
IEICE Transactions, 2013

High-order reconfigurable FIR filter design based on statistical analysis of CSD coefficients.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Timing-constrained minimum area/power FPGA memory mapping.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A CMOS Field Programmable Analog Array for intelligent sensory application.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A fast-locking digital DLL with a high resolution time-to-digital converter.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2011
Self-test method and recovery mechanism for high frequency TSV array.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

Performance evaluation of air-gap-based coaxial RF TSV for 3D NoC.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

A TIA-based readout circuit with temperature compensation for MEMS capacitive gyroscope.
Proceedings of the 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2011

A novel low voltage Subtracting BandGap Reference with temperature coefficient of 2.2 ppm/°.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Current Mode Feed-Forward Gain Control for 0.8V CMOS hearing aid.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A TIA-based interface for MEMS capacitive gyroscope.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

Integrated Gm-C based PI controller for MEMS gyroscope drive loop.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A matrix approach to low-voltage low-power log-domain CMOS current-mode adjustable-bandwidth step-gain filter design.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
A MEMS gyroscope readout circuit with temperature compensation.
Proceedings of the 5th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2010

Overview: Emerging technologies on giga-scale FPGA implementat.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Electrical characterization of RF TSV for 3D multi-core and heterogeneous ICs.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Start-up analysis for differential ring oscillator with even number of stages.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

A 47-dB linear CMOS variable gain amplifier using current squaring technique.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
Carbon Nanotube Nanorelays with Pass-Transistor for FPGA Routing Devices.
Proceedings of the Nano-Net - 4th International ICST Conference, 2009

FPGA based on integration of carbon nanorelays and CMOS devices.
Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures, 2009

2008
"Time borrowing" technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
Noise Analysis and Simulation of Chopper Amplifier.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
A pH-ISFET Based Micro Sensor System on Chip Using Standard CMOS Technology.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

Impact of capacitor array mismatch in embedded CMOS CR SAR ADC design.
Proceedings of the Third IASTED International Conference on Circuits, 2005


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