Hsiang-Chi Cheng

Orcid: 0000-0002-8029-7208

According to our database1, Hsiang-Chi Cheng authored at least 9 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A VCO-Based Readout ADC for Quasi-Static Sensing Applications in 3-µm Low-Temperature Poly-Silicon Thin-Film Transistor Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2019
A programmbale 8-channel multiphase clock generator with 360 phases for focus ultrasound applications.
Microelectron. J., 2019

2018
A 13.56 MHz CMOS High-Efficiency Active Rectifier With Dynamically Controllable Comparator for Biomedical Wireless Power Transfer Systems.
IEEE Access, 2018

2016
Output capacitor-free low-dropout regulator with fast transient response and ultra small compensation capacitor.
Microelectron. J., 2016

An all-digital DLL with duty-cycle correction using reusable TDC.
Int. J. Circuit Theory Appl., 2016

A self-calibrated delay-locked loop with low static phase error.
Int. J. Circuit Theory Appl., 2016

2015
All-digital controlled boost DC-DC converter with all-digital DLL-based calibration.
Microelectron. J., 2015

Pulsewidth control loop with a frequency detector for wide frequency range operation.
Microelectron. J., 2015

2014
A VCO-based phase-expanding conversion designed for time-domain data converters.
Microelectron. J., 2014


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