Tsung-Hsien Lin

Orcid: 0000-0002-1733-5945

According to our database1, Tsung-Hsien Lin authored at least 86 papers between 1998 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
A 0.6-V 12-bit Set-and-Down SAR ADC With a DAC-Based Bypass Window Switching Method.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2023

Protecting Sensitive Attributes by Adversarial Training Through Class-Overlapping Techniques.
IEEE Trans. Inf. Forensics Secur., 2023

A Time-Domain CCM/DCM Current-Mode Buck Converter with a PI Compensator Incorporating an Infinite Phase Shift Delay Line.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

Motion Artifact Correction in MRI using GAN-Based Channel Attention Transformer.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
A Temperature-Compensated Crystal Oscillator With Piecewise Polynomial Varactor Compensation Achieving ±3.75-ppm Inaccuracy From -30°C to 90°C.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Affective Computing Based on Morphological Features of Photoplethysmography for Patients with Hypertension.
Sensors, 2022

DeepFlu: a deep learning approach for forecasting symptomatic influenza A infection based on pre-exposure gene expression.
Comput. Methods Programs Biomed., 2022

An Open-loop VCO-based ADC with Quasi-Chopping and Non-linearity Cancellation for Bio-Sensor Applications.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

2021
Intelligent Wireless EEG Measurement System With Electrical and Optogenetic Stimulation for Epileptic Seizure Detection and Suppression.
IEEE Access, 2021

A Hybrid Supply Modulator for 10-MHz LTE Power Amplifier with 17.3% PAE Improvement.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021

29.5 A 0.008mm<sup>2</sup> 1.5mW 0.625-to-200MHz Fractional Output Divider with 120fsrms Jitter Based on Replica-DTC-Free Background Calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A ± 20-ppm -50°C-105°C 1-µA 32.768-kHz Clock Generator with a System-HFXO-Assisted Background Calibration.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
Design of a 0.6-V, 429-MHz FSK Transceiver Using Q-Enhanced and Direct Power Transfer Techniques in 90-nm CMOS.
IEEE J. Solid State Circuits, 2020

A 0.5-V, 1.79-μW, 250-kbps Wake-up Receiver for IoT application in 90-nm CMOS.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

A 1-200MHz Multiple Output Fractional Divider Using Phase Rotating Technique.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

A CMOS Temperature Sensor Based on a Chopped Continuous-Time Delta-Sigma Modulator.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

A Single-Comparator Active Rectifier with Auto-Calibration in 0.18-μm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
An Analog Front-End Circuit for CO2 Sensor Readout in 0.18-µm CMOS Process.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

An Area-Efficient VCO-Based Hall Sensor Readout System for Autofocus Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A High Accuracy Constant-On-Time Buck Converter with Spur-Free On-Time Generator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 2.4-GHz 500-µW 370-fsrms Integrated Jitter Sub-Sampling Sub-Harmonically Injection-Locked PLL in 90-nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
Introduction to the Special Section on the 2017 Asian Solid-State Circuits Conference (A-SSCC).
IEEE J. Solid State Circuits, 2018

A Transient-Enhanced Constant On-Time Buck Converter with Light-Load Efficiency Optimization.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017
A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A Low-Noise Area-Efficient Chopped VCO-Based CTDSM for Sensor Applications in 40-nm CMOS.
IEEE J. Solid State Circuits, 2017

A current feedback instrumentation amplifier with chopping and dynamic element matching techniques and employing the current-reuse technique in input/feedback stages.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

Widely tunable guided-mode resonance filter using 90° twisted liquid crystal cladding.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

An area-efficient capacitively-coupled sensor readout circuit with current-splitting OTA and FIR-DAC.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

An ultra-low power 169-nA 32.768-kHz fractional-N PLL.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

A 1.5-GHz sub-sampling fractional-N PLL for spread-spectrum clock generator in 0.18-μm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

An area-efficient amplifier-less digitally-controlled li-ion battery charger in 0.35μm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

A 0.6-V 200-kbps 429-MHz ultra-low-power FSK transceiver in 90-nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016
A 330-µW 400-MHz BPSK Transmitter in 0.18- µm CMOS for Biomedical Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A Continuous-Time Delta-Sigma Modulator Using ELD-Compensation-Embedded SAB and DWA-Inherent Time-Domain Quantizer.
IEEE J. Solid State Circuits, 2016

A 0.5-V sub-mW energy-efficient receiver in 0.18-μm CMOS for IoT applications.
Proceedings of the International SoC Design Conference, 2016

A 40-nV/VHz 0.0145-mm<sup>2</sup> sensor readout circuit with chopped VCO-based CTDSM in 40-nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

An area-efficient wideband CMOS hall sensor system for camera autofocus systems.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015
A CMOS Thermistor-Embedded Continuous-Time Delta-Sigma Temperature Sensor With a Resolution FoM of 0.65 pJ°C<sup>2</sup>.
IEEE J. Solid State Circuits, 2015

A 127 fJ/conv. continuous-time delta-sigma modulator with a DWA-embedded two-step time-domain quantizer.
Proceedings of the VLSI Design, Automation and Test, 2015

5.3 A 2-channel -83.2dB crosstalk 0.061mm<sup>2</sup> CCIA with an orthogonal frequency chopping technique.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

EP2: Lost art? Analog tricks and techniques from the masters.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 13-MHz 68-dB SNDR CTDSM using SAB loop filter and interpolating flash quantizer with random-skip IDWA function in 90-nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014
A TDC-Based Two-Step Quantizer With Swapper Technique for a Multibit Continuous-Time Delta-Sigma Modulator.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

An 8.5MHz 67.2dB SNDR CTDSM with ELD compensation embedded twin-T SAB and circular TDC-based quantizer in 90nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2014

A 400MHz 10Mbps D-BPSK receiver with a reference-less dynamic phase-to-amplitude demodulation technique.
Proceedings of the Symposium on VLSI Circuits, 2014

Analog front-end amplifier for ECG applications with feed-forward EOS cancellation.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

Automatic elastic net clustering algorithm.
Proceedings of the 2014 IEEE International Conference on Systems, Man, and Cybernetics, 2014

LMS-based digital background linearization technique for VCO-based delta-sigma ADC.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

An Energy-Efficient QPSK Demodulation Scheme with Injection-Locking Technique for Green Radio Communication.
Proceedings of the 2014 IEEE International Conference on Internet of Things, 2014

A CMOS thermistor-embedded continuous-time delta-sigma temperature sensor with a resolution of 0.01 °C.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

A 135-μW 0.46-mΩ/√Hz thoracic impedance variance monitor with square-wave current modulation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

An area-efficient capacitively-coupled instrumentation amplifier with a duty-cycled Gm-C DC servo loop in 0.18-μm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013
A 650-pJ/bit MedRadio Transmitter With an FIR-Embedded Phase Modulator for Medical Micro-Power Networks (MMNs).
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A CMOS Cantilever-Based Label-Free DNA SoC With Improved Sensitivity for Hepatitis B Virus Detection.
IEEE Trans. Biomed. Circuits Syst., 2013

A low-power dual-mode continuous-time delta-sigma modulator with a folded quantizer.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

2012
Introduction to the Special Section on the 2011 Asian Solid-State Circuits Conference (A-SSCC).
IEEE J. Solid State Circuits, 2012

Simulation of laser phenomenon of cholesteric liquid crystal using axuillary differential equation finite-difference time-domain method.
Proceedings of the 21st Annual Wireless and Optical Communications Conference, 2012

Electrical and optical switchings of the direcitons of cholesteric liquid crystals gratings.
Proceedings of the 21st Annual Wireless and Optical Communications Conference, 2012

An energy-efficient ultra-wideband transmitter with an FIR pulse-shaping filter.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

A sensor-merged oscillator-based readout circuit for pizeo-resistive sensing applications.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012

2011
A Synchronous 50% Duty-Cycle Clock Generator in 0.35- μ m CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A 0.89-mW 1-MHz 62-dB SNDR Continuous-Time Delta-Sigma Modulator With an Asynchronous Sequential Quantizer and Digital Excess-Loop-Delay Compensation.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

A Quadrature Bandpass Continuous-Time Delta-Sigma Modulator for a Tri-Mode GSM-EDGE/UMTS/DVB-T Receiver.
IEEE J. Solid State Circuits, 2011

A 15-mW 2.4-GHz IEEE 802.15.4 transmitter with a FIR-embedded phase modulator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

An energy-efficient super-regenerative ASK receiver with a ΔΣ-based pulse-width demodulator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

A 4MHz BW 69dB SNDR continuous-time delta-sigma modulator with reduced sensitivity to clock jitter.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
A Delta-Sigma Pulse-Width Digitization Technique for Super-Regenerative Receivers.
IEEE J. Solid State Circuits, 2010

A Dynamic Phase Error Compensation Technique for Fast-Locking Phase-Locked Loops.
IEEE J. Solid State Circuits, 2010

Dual-mode Continuous-Time Quadrature Bandpass ΔΣ modulator with Pseudo-random Quadrature mismatch shaping algorithm for Low-IF receiver application.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Dynamic Current-Matching Charge Pump and Gated-Offset Linearization Technique for Delta-Sigma Fractional- N PLLs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A Wideband PLL-Based G/FSK Transmitter in 0.18 µm CMOS.
IEEE J. Solid State Circuits, 2009

2008
A 2.4-GHz fractional-N PLL with a PFD/CP linearization and an improved CP circuit.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A 3.5-mW 15-Mbps O-QPSK transmitter for real-time wireless medical imaging applications.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
A 0.8-V 0.25-mW Current-Mirror OTA With 160-MHz GBW in 0.18-μm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

An Agile VCO Frequency Calibration Technique for a 10-GHz CMOS PLL.
IEEE J. Solid State Circuits, 2007


An energy-efficient 1.5-Mbps wireless FSK transmitter with A ∑Δ-modulated phase rotator.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006
Low-Power Radio Design for Wireless Smart Sensor Networks.
Proceedings of the Second International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2006), 2006

2004
Integrated low-power communication system design for wireless sensor networks.
IEEE Commun. Mag., 2004

2003
A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard.
IEEE J. Solid State Circuits, 2003

2001
A 900-MHz 2.5-mA CMOS frequency synthesizer with an automatic SC tuning loop.
IEEE J. Solid State Circuits, 2001

2000
High Speed Digital Transmission Networking: G. Held.
Comput. Commun., 2000

1999
CMOS front-end LNA-mixer of micropower RF wireless systems.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

1998
CMOS front end components for micropower RF wireless systems.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998


  Loading...