Hsiang-Yu Shih

According to our database, Hsiang-Yu Shih authored at least 3 papers between 2017 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Power-effective ROM-less DDFS Design Approach with High SFDR Performance.

Chua-Chin Wang, Nanang Sulistiyanto, Hsiang-Yu Shih, Yu-Cheng Lin, Wei Wang

J. Signal Process. Syst., 2020

2019

74-dBc SFDR 71-MHz Four-Stage Pipeline ROM-Less DDFS Using Factorized Second-Order Parabolic Equations.

Chua-Chin Wang, Pang-Yen Lou, Tsung-Yi Tsai, Hsiang-Yu Shih

IEEE Trans. Very Large Scale Integr. Syst., 2019

2017

A pipeline ROM-less DDFS using equal-division interpolation.

Tsung-Yi Tsai, Hsiang-Yu Shih, Chua-Chin Wang

Proceedings of the International SoC Design Conference, 2017