Hsin-Chou Chi

According to our database, Hsin-Chou Chi authored at least 17 papers between 1991 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

A high-performance VLSI architecture for variable block size motion estimation.

Hsin-Chou Chi, Han-Sheng Liu, Hsi-Che Tseng

Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014

2013

Reconfigurable VLSI digital filters for tolerating multiple timing errors.

Hsin-Chou Chi, Hsi-Che Tseng, Chia-Wei Jeng

Proceedings of the IEEE 2nd Global Conference on Consumer Electronics, 2013

2012

Area Utilization Based Mapping for Network-on-chip Architectures with Over-sized IP Cores.

Hsin-Chou Chi, Jr-Fen Ferng, Yu-Chen Hsieh

Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

2011

Efficient diagnosable design of the IEEE P1500 architecture for SoC testing.

Hsin-Chou Chi, Hsi-Che Tseng, Chih-Ling Yang

Proceedings of the 2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, 2011

Design of timing-error-resilient systolic arrays for matrix multiplication.

Hsin-Chou Chi, Hsi-Che Tseng, Kun-Lin Tsai

Proceedings of the International SoC Design Conference, 2011

2010

Design of a Reconfigurable Pipelined Switch for Faulty On-Chip Networks.

Hsin-Chou Chi, Tat-Seng Chang, Chia-Ming Wu

Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010

Tree-Based Routing for Faulty On-Chip Networks with Mesh Topology.

Hsin-Chou Chi, Yu-Hong Jhang, Wen-Shu Chen

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009

Efficient diagnosis of scan chains with single stuck-at faults.

Hsin-Chou Chi, Hsi-Che Tseng, Chih-Ling Yang

Proceedings of the 43rd Annual Conference on Information Sciences and Systems, 2009

2008

Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip Architectures.

Hsin-Chou Chi, Chia-Ming Wu, Jun-Hui Lee

Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2006

An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures.

Hsin-Chou Chi, Chia-Ming Wu

Proceedings of the IFIP VLSI-SoC 2006, 2006

A Switch Supporting Circuit and Packet Switching for On-Chip Networks.

Hsin-Chou Chi, Chia-Ming Wu, Sung-Tze Wu

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005

Efficient Switches for Network-on-Chip Based Embedded Systems.

Hsin-Chou Chi, Chia-Ming Wu

Proceedings of the Embedded and Ubiquitous Computing, 2005

2003

Routing Tree Construction for Interconnection Network with Irregular Topologies.

Hsin-Chou Chi, Wen-Jen Wu

Proceedings of the 11th Euromicro Workshop on Parallel, 2003

1997

A Deadlock-Free Routing Scheme for Interconnection Networks with Irregular Topologies.

Hsin-Chou Chi, Chih-Tsung Tang

Proceedings of the 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 1997

1994

Starvation Prevention for Arbiters of Crossbars with Multi-Queue Input Buffers.

Hsin-Chou Chi, Yuval Tamir

Proceedings of the Spring COMPCON 94, Digest of Papers, San Francisco, California, USA, February 28, 1994

1993

Symmetric Crossbar Arbiters for VLSI Communication Switches.

Yuval Tamir, Hsin-Chou Chi

IEEE Trans. Parallel Distributed Syst., 1993

1991

Decomposed Arbiters for Large Crossbars with Multi-Queue Input Buffers.

Hsin-Chou Chi, Yuval Tamir

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991