Huanlin Xie

Orcid: 0009-0004-4168-6149

According to our database¹, Huanlin Xie authored at least 4 papers in 2025.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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Bibliography

2025

A 9-GHz Low-In-Band Noise Sub-Sampling-Chopper PLL With Charge-Share Canceling Technique.

[BibT_eX]

[DOI]

Robert Bogdan Staszewski

Chunbing Guo

IEEE J. Solid State Circuits, April, 2025

A 24-kHz bandwidth 94.8-dB-SNDR discrete-time dynamic zoom ADC with analog-domain combine.

[BibT_eX]

[DOI]

Microelectron. J., 2025

A time-interleaved 2b/Cycle SAR ADC with sign-inversion method for timing-skew calibration.

[BibT_eX]

[DOI]

Microelectron. J., 2025

A 2-MHz BW 93.2-dB SFDR 2nd-Order Hybrid EF-CIFF Noise Shaping SAR ADC.

[BibT_eX]

[DOI]

Microelectron. J., 2025

Huanlin Xie

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