Xiangjian Kong

Orcid: 0000-0002-4123-5231

According to our database¹, Xiangjian Kong authored at least 4 papers between 2022 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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PhD thesis

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Bibliography

2024

RFIC Reuse Techniques to Enable Ultra-Low-Power IoT: A Tutorial.

[BibT_eX]

[DOI]

Kai Xu

Xiangjian Kong

Robert Bogdan Staszewski

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

2023

A 1-V 9.6-GHz charge-pump PLL with low RMS-integrated jitter.

[BibT_eX]

[DOI]

Microelectron. J., December, 2023

A Dual-Core Quad_Mode VCO with Reconfigurable Magnetic Coupling Mode and Negative-Resistive Mode Switch.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022

A 12-bit SAR ADC with a reversible V<sub>CM</sub>-based capacitor switching scheme.

[BibT_eX]

[DOI]

Microelectron. J., 2022

Xiangjian Kong

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