Huanyu Ge

According to our database, Huanyu Ge authored at least 3 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

A 22.0-to-28.4GHz 192.2dBc/Hz FoM and 206.2dBc/Hz FoMA Dual-Core VCO Using Circular-Inverse-Class-F Topology Under Standard Supply Voltage in 65nm CMOS Process.

Huanyu Ge, Haikun Jia, Wei Deng, Baoyong Chi

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024

19.5 A 13.7-to-41.5GHz 214.1dBc/Hz FoMT Quad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique.

Huanyu Ge, Haikun Jia, Wei Deng, Ruichang Ma, Zhihua Wang, Baoyong Chi

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

A 194.9dBc/Hz FoM and 6.8-to-11.6GHz Quad-Core Dual-Mode Class-F VCO Featuring Wideband Flicker Noise Suppression.

Huanyu Ge, Haikun Jia, Wei Deng, Ruichang Ma, Baoyong Chi

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024