Zhihua Wang

Orcid: 0000-0001-6567-0759

Affiliations:
  • Tsinghua University, Institute of Microelectronics, Beijing, China (PhD 1990)


According to our database1, Zhihua Wang authored at least 520 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Online presence:

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Bibliography

2024
A 0.14-nJ/b 200-Mb/s 2.7-3.5-GHz Quasi-Balanced FSK Transceiver With PLL-Based Modulation and Sideband Energy Detection.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

Cryogenic CMOS RF Circuits: A Promising Approach for Large-Scale Quantum Computing.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A DTC-Free Fractional-N BBPLL With FIR-Embedded Injection-Locked-Oscillator-Based Phase-Domain Lowpass Filter.
IEEE J. Solid State Circuits, March, 2024

A Low-Phase-Noise VCO With Common-Mode Resonance Expansion and Intrinsic Differential 2nd-Harmonic Output Based on a Single Three-Coil Transformer.
IEEE J. Solid State Circuits, January, 2024

3.2 A 0.028mm² 32MHz RC Frequency Reference in 0.18μm CMOS with ±900ppm Inaccuracy from -40°C to 125°C and ±1600ppm Inaccuracy After Accelerated Aging.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

29.4 A Cryo-CMOS Quantum Computing Unit Interface Chipset in 28nm Bulk CMOS with Phase-Detection Based Readout and Phase-Shifter Based Pulse Generation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

19.5 A 13.7-to-41.5GHz 214.1dBc/Hz FoMT Quad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
A 24-30-GHz Four-Element Phased Array Transceiver With Low Insertion Loss Compact T/R Switch and Bidirectional Phase Shifter for 5G Communication.
IEEE Trans. Very Large Scale Integr. Syst., November, 2023

A Polar-Modulation-Based Cryogenic Transmon Qubit State Controller in 28 nm Bulk CMOS for Superconducting Quantum Computing.
IEEE J. Solid State Circuits, November, 2023

A Compact and Low Phase Noise Square-Geometry Quad-Core Class-F VCO Using Parallel Inductor-Sharing Technique.
IEEE J. Solid State Circuits, October, 2023

A 128 Gbps PAM-4 feed forward equaliser with optimized 1UI pulse generator in 65 nm CMOS.
IET Circuits Devices Syst., May, 2023

A Low-Phase-Noise Quad-Core Millimeter-Wave Fundamental VCO Using Circular Triple-Coupled Transformer in 65-nm CMOS.
IEEE J. Solid State Circuits, February, 2023

A D-Band Joint Radar-Communication CMOS Transceiver.
IEEE J. Solid State Circuits, February, 2023

A Low Noise High Speed Dynamic Comparator Insensitive to PVT and Common-mode Input.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A Resistive Sensor Interface IC with Inductively Coupled Wireless Energy Harvesting and Data Telemetry for Implantable Pressure Sensing.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

A 1-1.7 GHz Cryogenic Fractional-N CP-PLL for Quantum Computing Applications.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

A 10-to-300MHz Fractional Output Divider with -80dBc Worst-Case Fractional Spurs Using Auxiliary-PLL-Based Background 0th/1<sup>st</sup>/2<sup>nd</sup>-Order DTC INL Calibration.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

An 11.5-to-14.3GHz 192.8dBc/Hz FoM at 1MHz Offset Dual-Core Enhanced Class-F VCO with Common-Mode-Noise Self-Cancellation and Isolation Technique.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Quadrature Uncertain-IF IR-UWB Transceiver with Twin-OOK Modulation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Polar-Modulation-Based Cryogenic Qubit State Controller in 28nm Bulk CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

Resource-efficient Face Detector Using 1.5-bit Frame-to-frame Delta Quantization for Image Based Always-on Wake-up Application.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Current-Steering DAC Calibration Using Q-Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Compact 16-Channel Neural Signal Recorder with Wireless Power and Data Transmission.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

High Linearity Front-End Circuit for RF Sampling ADCs with Nonlinear Junction Capacitor Cancellation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 405ps/20% Delay Range, 7.4mW/ns BPF-Based Delay Cell with ISI Mitigation for 7.5-8.5GHz IR-UWB Beamforming Receivers.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 400uW 3.6GHz-4.6GHz Low Power Cryogenic CP-PLL with Transformer-Based VCO in 28nm Bulk CMOS.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 17.3mW IEEE 802.15.4/4z Coherent Quadrature Hybrid Correlation UWB Receiver in 65nm CMOS.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A 7.4μJ.ppm2 Resistance Sensor with ±120ppm (3σ) 1-Point-Trimmed Inaccuracy and <4ppm/°C Temperature Drift from -55°C to 125°C.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

A 25.0-to-35.9GHz Dual-Layer Quad-Core Dual-Mode VCO with 189.1dBc/Hz FoM and 200.2dBc/Hz FoMT at 1MHz Offset in 65nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

A 2.6GHz ΔΣ Fractional-N Bang-Bang PLL with FIR-Embedded Injection-Locking Phase-Domain Low-Pass Filter.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

IEEE ASSCC 2023/ Session 10/ Paper 10.5.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

A 4-Element 4-Beam Ka-Band Phased-Array Receiver Using Mesh Topology in 65 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

A Compact E-Band Load-Modulation Balanced Power Amplifier Using Coupled Transmission-Line Output Network Achieving 22.1-dBm Psat and 34.9%/12.2% Efficiency at Psat/6-dB PBO.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

A Fully Integrated Bit-to-Bit 24/48Gb/s QPSK/16-QAM D-Band Transceiver with Mixed-Signal Baseband in 28nm CMOS Technology.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

A Low-Voltage Bias-Current-Free Pseudo-Differential Hybrid PLL Using a Time-Interleaving Flip-Flop Phase Detector.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022
A Binarized CNN-Based Bowel Sound Recognition Algorithm With Time-Domain Histogram Features for Wearable Healthcare Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Multichannel Multidomain-Based Knowledge Distillation Algorithm for Sleep Staging With Single-Channel EEG.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 4.4-GHz 193.2-dB FoM 8-Shaped-Inductor Based LC-VCO Using Orthogonal-Coupled Triple-Coil Transformer.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

LightSleepNet: Design of a Personalized Portable Sleep Staging System Based on Single-Channel EEG.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Quantization Noise Reduction Method for Delta-Sigma Fractional-N PLLs Using Cascaded Injection-Locked Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Single Chain 800M/1.8G/2.4GHz Multistandard Transceiver With Multibranch Transformer for Low-Cost IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 56-Gbps PAM-4 Wireline Receiver With 4-Tap Direct DFE Employing Dynamic CML Comparators in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A 13-Bit 2-GS/s Time-Interleaved ADC With Improved Correlation-Based Timing Skew Calibration Strategy.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A 2 nJ/bit, 2.3% FSK Error Fully Integrated Sub-2.4 GHz Transmitter With Duty-Cycle Controlled PA for Medical Band.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A 0.66mW 400 MHz/900 MHz Transmitter IC for In-Body Bio-Sensing Applications.
IEEE Trans. Biomed. Circuits Syst., 2022

A 746 nW ECG Processor ASIC Based on Ternary Neural Network.
IEEE Trans. Biomed. Circuits Syst., 2022

A 164- $\mu$ W 915-MHz Sub-Sampling Phase-Tracking Zero-IF Receiver With 5-Mb/s Data Rate for Short-Range Applications.
IEEE J. Solid State Circuits, 2022

A Self-Adapted Two-Point Modulation Type-II Digital PLL for Fast Chirp Rate and Wide Chirp-Bandwidth FMCW Signal Generation.
IEEE J. Solid State Circuits, 2022

A 53.6-to-60.2GHz Many-Core Fundamental Oscillator With Scalable Mesh Topology Achieving -136.0dBc/Hz Phase Noise at 10MHz Offset and 190.3dBc/Hz Peak FoM in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 1.92 μA Always-on ECG Monitoring Mixed-Signal SoC for Implantable Medical Application.
Proceedings of the 19th International SoC Design Conference, 2022

Wearable Bowel Sound Monitoring with Quality Enhancement using U-net.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

An 8GHz Communication/Ranging IR-UWB Transmitter with Asymmetric Pulse Shaping and Frequency Hopping for Fine Ranging and Enhanced Link Margin.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 0.7-2.5GHz NB-loT/GNSS/BLE Hybrid PLL with PA Pulling Mitigation and Out-of-Band Phase Noise Reduction.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

A statistics-based background capacitor mismatch calibration algorithm for SAR ADC.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

An Analog-Assisted Digital LDO with 0.37mV Output Ripple and 5500x Load Current Range in 180nm CMOS.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

A 22.8 GHz to 32.8 GHz Compact Power Amplifier with a 15 dBm Output P1dB and 36.5% Peak PAE in 65-nm CMOS.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

A 4.7GHz Synchronized-Multi-Reference PLL with In-Band Phase Noise Lower than Reference Phase Noise +20logN<sub>div</sub>.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

Investigating the Effects of Anatomical Structures on the Induced Electric Field in the Brain in Transcranial Magnetic Stimulation.
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022

A 7.25-7.75GHz 5.9mW UWB Transceiver with -23.8dBm NBI Tolerance and 1.5cm Ranging Accuracy Using Uncertain IF and Pulse-Triggered Envelope/Energy Detection.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

A 0.14nJ/b 200Mb/s Quasi-Balanced FSK Transceiver with Closed-Loop Modulation and Sideband Energy Detection.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

A 12.5-to-15.4GHz, -118.9dBc/Hz PN at 1MHz offset, and 191.0dBc/Hz FoM VCO with Common-Mode Resonance Expansion and Simultaneous Differential 2ND-Harmonic Output using a Single Three-Coil Transformer in 65nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

Resource Efficient Gas Classifier Based on 1.5-bit Quantization of Sensing Channel Difference for Electronic Nose.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

2021
A 13-bit 312.5-MS/s Pipelined SAR ADC With Open-Loop Integrator-Based Residue Amplifier and Gain-Stabilized Integration Time Generation.
IEEE Trans. Very Large Scale Integr. Syst., 2021

A 2.4-GHz Crystal-Less GFSK Receiver Using an Auxiliary Multiphase BBPLL for Digital Output Demodulation With Enhanced Frequency Scaling.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Bias-Current-Free Fractional-N Hybrid PLL for Low-Voltage Clock Generation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Design Flow for Click-Based Asynchronous Circuits Design With Conventional EDA Tools.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

A 2.63 μW ECG Processor With Adaptive Arrhythmia Detection and Data Compression for Implantable Cardiac Monitoring Device.
IEEE Trans. Biomed. Circuits Syst., 2021

A 4-μW Analog Front End Achieving 2.4 NEF for Long-Term ECG Monitoring.
IEEE Trans. Biomed. Circuits Syst., 2021

3D DCT Based Image Compression Method for the Medical Endoscopic Application.
Sensors, 2021

Using breath sound data to detect intraoperative respiratory depression in non-intubated anesthesia.
Sci. China Inf. Sci., 2021

An 11.05 mW/Gbps Quad-Channel 1.25-10.3125 Gbps Serial Transceiver With a 2-Tap Adaptive DFE and a 3-Tap Transmit FFE in 40 nm CMOS.
IEEE Access, 2021

A 122-168GHz Radar/Communication Fusion-Mode Transceiver with 30GHz Chirp Bandwidth, 13dBm Psat, and 8.3dBm OP1dB in 28nm CMOS.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

A 11.1-to-14.2 GHz Self-adapted Two-point Modulation Dual-path Type-II Digital PLL Concurrently Achieving 124.7-MHz/μs Chirp Rate and 2.27-GHz Bandwidth.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

A 60GHz 186.5dBc/Hz FoM Quad-Core Fundamental VCO Using Circular Triple-Coupled Transformer with No Mode Ambiguity in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

An Object Enhancement Method for Forward-Looking Sonar Images Based on Multi-Frame Fusion.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 12-Bit 2-GS/s Pipelined ADC Front-End Stage with Aperture Error Tuning and Split MDAC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Novel Stripe Extraction Scheme for the Multi-Line Structured Light Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Design and Analysis of DTC-Free ΔΣ Bang-Bang Phase-Locked Loops.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

An Energy-Efficient Binarized Neural Network Using Analog-Intensive Feature Extraction for Keyword and Speaker Verification Wakeup.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 110pJ/Bit Star- 16QAM 915MHz Band Ultra-Low Power Receiver Based on Polar Architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 2.52 μΑ Wearable Single Lead Ternary Neural Network Based Cardiac Arrhythmia Detection Processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

An Area-Saving Balun for Multiband IoT Transmitter.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 40 Gbps PAM-4 Receiver with 12-Tap Direct Decision Feedback Equalizer Employing 1.5-stage Slicers in 65-nm CMOS.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 0.0048mm<sup>2</sup> 0.43-to-1.0V 0.54-to-1.76GHz Bias-Current-Free PLL in 14nm FinFET CMOS.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A C-band FMCW Radar Transmitter with a 22 dBm Output Power Series-stacking CMCD PA for Long-distance Detection in 180-nm CMOS Technology.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

Optimization methods for high inductance-density inductors for high speed integrated circuits.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A Portable Pressure and Force Line Trajectory Measuring System for Unicondylar Knee Arthroplasty<sup>*</sup>.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021

An Ultra-Compact 16-to-45 GHz Power Amplifier within A Single Inductor Footprint Using Folded Transformer Technique.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

An 8.2-to-21.5 GHz Dual-Core Quad-Mode Orthogonal-Coupled VCO with Concurrently Dual-Output using Parallel 8-Shaped Resonator.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

A 24-30GHz 4-Element Phased Array Transceiver with Low Insertion Loss Compact T/R Switch and Bidirectional Phase Shifter in 65 nm CMOS Technology.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

A 33.5-37.5 GHz 4-Element Phased-Array Transceiver Front-End with High-Accuracy Low-Variation 6-bit Resolution 360° Phase Shift and 0~31.5 dB Gain Control in 65 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
A 14-bit 200-Ms/s SHA-Less Pipelined ADC With Aperture Error Reduction.
IEEE Trans. Very Large Scale Integr. Syst., 2020

A Wireless Trajectory Measurement System for Unicondylar Knee Arthroplasty.
IEEE Trans. Instrum. Meas., 2020

A Simple Histogram-Based Capacitor Mismatch Calibration in SAR ADCs.
IEEE Trans. Circuits Syst., 2020

A U-Band PLL Using Implicit Distributed Resonators for Sub-THz Wireless Transceivers in 40 nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Long-Term Bowel Sound Monitoring and Segmentation by Wearable Devices and Convolutional Neural Networks.
IEEE Trans. Biomed. Circuits Syst., 2020

A Supervised Speech Enhancement Method for Smartphone-Based Binaural Hearing Aids.
IEEE Trans. Biomed. Circuits Syst., 2020

Design of a Low Noise Bio-Potential Recorder With High Tolerance to Power-Line Interference Under 0.8 V Power Supply.
IEEE Trans. Biomed. Circuits Syst., 2020

Guest Editorial.
IEEE Open J. Circuits Syst., 2020

Power Efficient Tiny Yolo CNN Using Reduced Hardware Resources Based on Booth Multiplier and WALLACE Tree Adders.
IEEE Open J. Circuits Syst., 2020

A 6.5-8.1-GHz Communication/Ranging VWB Transceiver for Secure Wireless Connectivity With Enhanced Bandwidth Efficiency and ΔΣ Energy Detection.
IEEE J. Solid State Circuits, 2020

A 530 nA quiescent current low-dropout regulator with embedded reference for wake-up receivers.
Sci. China Inf. Sci., 2020

A CRNN System for Sound Event Detection Based on Gastrointestinal Sound Dataset Collected by Wearable Auscultation Devices.
IEEE Access, 2020

A Smart Binaural Hearing Aid Architecture Leveraging a Smartphone APP With Deep-Learning Speech Enhancement.
IEEE Access, 2020

A 5.4GHz ΔΣ Bang-Bang PLL with 19dB In-Band Noise Reduction by Using a Nested PLL Filter.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

A Correlation-based Timing Skew Calibration Strategy Using a Time-Interleaved Reference ADC.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

A 13-bit 312.5-MS/s Pipelined SAR ADC with Integrator-type Residue Amplifier and Inter-stage Gain Stabilization Technique.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

A CNN Based Human Bowel Sound Segment Recognition Algorithm with Reduced Computation Complexity for Wearable Healthcare System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A 2.8 μW 0.022 mm2 8 MHz Monolithic Relaxation Oscillator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Low-Spur Current-Biasing-Free Fractional-N Hybrid PLL for Low-Voltage Clock Generation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Coverage Optimization of the Tunable Ladder Matching Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A 34 nA Quiescent Current Switched-Capacitor Step-Down Converter with 1.2V Output Voltage and 0-5μA Load Current.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A 0.6V 12-Bit Binary-Scaled Redundant SAR ADC with 83dB SFDR.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Design of a Hybrid Competition-Cooperation Teacher-Students Model for Single Channel Based Sleep Staging.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Tri-FeatureNet: An Adversarial Learning-Based Invariant Feature Extraction for Sleep Staging using Single-Channel EEG.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Swap-Combine Offset & Flicker Noise Cancellation Technique for Discrete Time Amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Customized Low Static Leakage Near/Sub-threshold Standard Cell Library Using Thick-gate Transistors.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A Nonlinearity-Calibration-Free Reconfigurable ADPLL for General Purpose Frequency Modulation.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 0.7-V Clock-gating Cell with Power Gating Technology and 1.56-pA Sleep Power.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A Simultaneous Wireless Power and Uplink Data Transfer System with Ultra-Low Crosstalk between the Power and Data Link.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 41μA Direct Frequency Modulation IC for Indoor Voice Broadcast in LF Band with Background Frequency Calibration.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 6-8GHz Multichannel Reconfigurable Pulse-Based Transceiver with 3.5ns Processing Latency and 1cm Ranging Accuracy for Secure Wireless Connectivity.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

A 17.7-pJ/Cycle ECG Processor for Arrhythmia Detection with High Immunity to Power Line Interference and Baseline Drift.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019
A Capacitor-Less Ripple-Less Hybrid LDO With Exponential Ratio Array and 4000x Load Current Range.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A 14-Bit 500-MS/s Time-Interleaved ADC With Autocorrelation-Based Time Skew Calibration.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Simultaneous Power and Downlink Data Transfer System With Pulse Phase Modulation.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Fully Integrated 150-GHz Transceiver Front-End in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Design of a Flexible Wearable Smart sEMG Recorder Integrated Gradient Boosting Decision Tree Based Hand Gesture Recognition.
IEEE Trans. Biomed. Circuits Syst., 2019

CMOS Image Sensor Design and Image Processing Algorithm Implementation for Total Hip Arthroplasty Surgery.
IEEE Trans. Biomed. Circuits Syst., 2019

Smartphone-Based Hearing Self-Assessment System Using Hearing Aids With Fast Audiometry Method.
IEEE Trans. Biomed. Circuits Syst., 2019

A 0.0014 mm<sup>2</sup> 150 nW CMOS Temperature Sensor with Nonlinearity Characterization and Calibration for the -60 to +40 °C Measurement Range.
Sensors, 2019

A Wireless Visualized Sensing System with Prosthesis Pose Reconstruction for Total Knee Arthroplasty.
Sensors, 2019

A 3.7-mW 2.4-GHz Phase-Tracking GFSK Receiver With BBPLL-Based Demodulation.
IEEE J. Solid State Circuits, 2019

A Low-Noise Chopper Amplifier Designed for Multi-Channel Neural Signal Acquisition.
IEEE J. Solid State Circuits, 2019

2D reconstruction of small intestine's interior wall.
Comput. Biol. Medicine, 2019

Design and Analysis of Data-Pattern-Insensitive Phase-Tracking Receivers with Fully-Balanced FSK Modulation.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

A 9mW 6-9GHz 2.5Gb/s Proximity Transmitter with Combined OOK/BPSK Modulation for Low Power Mobile Connectivity.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

An RNN-based Speech Enhancement Method for a Binaural Hearing Aid System.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Wireless Capsule Endoscopic Image Enhancement Method Based on Histogram Correction and Unsharp Masking in Wavelet Domain.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

A Power Mixer Based Dual-Band Transmitter for NB-IoT Applications.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A 4-40 Gb/s PAM-4 transmitter with a hybrid driver in 65 nm CMOS technology.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

DCO gain calibration technique in fractional-N Δ-Σ PLL based two-point phase modulators.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Noise and Spur Reduction Technique for ΔΣ Fractional-N Bang-Bang PLLs with Embedded Phase Domain Filtering.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Solution to Optimize Multi-Operand Adders in CNN Architecture on FPGA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Gaussian-Filtered Fully-Balanced FSK Modulator with Integer-N PLL Based 1<sup>+</sup>-Point Modulation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Force Line Trajectory Measuring System and Algorithms for Unicondylar Knee Replacement Surgery.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

An Energy-Efficient Implantable-Neural-Stimulator System with Wireless Charging and Dynamic Voltage Output.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

A 5GHz 200kHz/5000ppm Spread-Spectrum Clock Generator with Calibration-Free Two-Point Modulation Using a Nested-Loop BBPLL.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A CNN-Based Blind Denoising Method for Endoscopic Images.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

Detail Recovery in Medical Images Denoising.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

A 0.8V Chopper Amplifier with 600mVpp Tolerance to Power-Line Interference for Neural Signal Acquisition.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

Passive Implantable Wireless Intracranial Pressure Monitoring Based on Near Field Communication.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

A 360-456 MHz PLL frequency synthesizer with digitally controlled charge pump leakage calibration.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

A 2Mbps sub-100µW Crystal-less RF Transmitter with Energy Harvesting for Multi-Channel Neural Signal Acquisition.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

A 100Mb/s 3.5GHz Fully-Balanced BFOOK Modulator Based on Integer-N Hyrbrid PLL.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

A 0.9/1.8/2.4GHz-reconfigurable LNA with Inductor and Capacitor Tuning for IoT Application in 65nm CMOS.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

An Inductive Power Transfer System With Adjustable Compensation Network For Implantable Medical Devices.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018
Measurement System for Attitude of Anterior Pelvic Plane and Implantation of Prothesis in THR Surgery.
IEEE Trans. Instrum. Meas., 2018

A Scan-Line Forest Growing-Based Hand Segmentation Framework With Multipriority Vertex Stereo Matching for Wearable Devices.
IEEE Trans. Cybern., 2018

Hand Gesture Recognition With Multiscale Weighted Histogram of Contour Direction Normalization for Wearable Applications.
IEEE Trans. Circuits Syst. Video Technol., 2018

400-MHz/2.4-GHz Combo WPAN Transceiver IC for Simultaneous Dual-Band Communication With One Single Antenna.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 1-GHz 1.6-mW Auto-Calibrated Bit Slicer for Energy/Envelope Detection Receivers.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A 120 pJ/bit ΔΣ-Based 2.4-GHz Transmitter Using FIR-Embedded Digital Power Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A 5-mW 750-kb/s Noninvasive Transceiver for Around-the-Head Audio Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Adas on Cots with OpenCL: A Case Study with Lane Detection.
IEEE Trans. Computers, 2018

Adaptive Image Enhancement Based on Guide Image and Fraction-Power Transformation for Wireless Capsule Endoscopy.
IEEE Trans. Biomed. Circuits Syst., 2018

Implantable Wireless Intracranial Pressure Monitoring Based on Air Pressure Sensing.
IEEE Trans. Biomed. Circuits Syst., 2018

A 0.1-5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS.
Microelectron. J., 2018

A power scalable 2-10 Gb/s PI-based clock data recovery for multilane applications.
Microelectron. J., 2018

A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector.
IEEE J. Solid State Circuits, 2018

A Bio-inspired Collision Detecotr for Small Quadcopter.
CoRR, 2018

Bowel sound recognition using SVM classification in a wearable health monitoring system.
Sci. China Inf. Sci., 2018

A ΔΣ DPLL with 1b TDC, 4b DTC and 8-tap FIR filter for low-voltage clock generation/modulation systems.
Proceedings of the 2018 International Symposium on VLSI Design, 2018

An Energy-Efficient High-Frequency Neuro-Stimulator with Parallel Pulse Generators, Staggered Output and Extended Average Current Range.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Low-Power 12-bit 2GS/s Time-Interleaved Pipelined-SAR ADC in 28nm CMOS Process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A 14-bit 250MS/s Low-Power Pipeline ADC with Aperture Error Eliminating Technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Trajectory Measurement System and Algorithms for Unicondylar Knee Replacement Surgery.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Design of A Low Noise Neural Recording Amplifier for Closed-loop Neuromodulation Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Activity Recognition in Wearable ECG Monitoring Aided by Accelerometer Data.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Bio-inspired Collision Detector for Small Quadcopter.
Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Design and FPGA Implementation of an High Efficient XGBoost Based Sleep Staging Algorithm Using Single Channel EEG.
Proceedings of the Cognitive Systems and Signal Processing - 4th International Conference, 2018

A Model for Detection of Angular Velocity of Image Motion Based on the Temporal Tuning of the Drosophila.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2018, 2018

Design of a 3.24μW, 39nV/√Hz chopper amplifier with 5.5Hz noise corner frequency for invasive neural signal acquisition.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

A 26.6mW 1Gb/s dual-antenna wideband receiver with auto beam steering for secure proximity communications.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

Guided Frequency Filter For Block-DCT Compressed Capsule Endoscopic Images.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

A MVDR- MWF Combined Algorithm for Binaural Hearing Aid System.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

Image Enhancement Method Based on Adaptive Fraction Gamma Transformation and Color Restoration for Wireless Capsule Endoscopy.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

Bowel Sound Detection Based on MFCC Feature and LSTM Neural Network.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

Lung Nodule Segmentation Using Pleural Wall Shape.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

A 6-8GHZ 200MHz Bandwidth 9-Channel VWB Transceiver with 8 Frequency-Hopping Subbands.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

Patterns Detection and Recognition in Visual Aided System for Prosthesis Pose Estimation during Total Hip Replacement Surgery.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
A Flexible Continuous-Time Δ Σ ADC With Programmable Bandwidth Supporting Low-Pass and Complex Bandpass Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A 17 mW 3-to-5 GHz Duty-Cycled Vital Sign Detection Radar Transceiver With Frequency Hopping and Time-Domain Oversampling.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Monocular Vision- and IMU-Based System for Prosthesis Pose Estimation During Total Hip Replacement Surgery.
IEEE Trans. Biomed. Circuits Syst., 2017

Guest Editorial ISCAS 2016 Special Issue.
IEEE Trans. Biomed. Circuits Syst., 2017

Resonance Frequency Readout Circuit for a 900 MHz SAW Device.
Sensors, 2017

A 0.1-5.0 GHz SDR transmitter with current-mode power-mixer and self-calibration scheme in 65 nm CMOS.
Microelectron. J., 2017

A 40-Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset in 65-nm CMOS.
IEEE J. Solid State Circuits, 2017

A 1.9-mW 750-kb/s 2.4-GHz F-OOK Transmitter With Symmetric FM Template and High-Point Modulation PLL.
IEEE J. Solid State Circuits, 2017

A 0.42-mW 1-Mb/s 3- to 4-GHz Transceiver in 0.18-µm CMOS With Flexible Efficiency, Bandwidth, and Distance Control for IoT Applications.
IEEE J. Solid State Circuits, 2017

A Wireless Body Sound Sensor with a Dedicated Compact Chipset.
Circuits Syst. Signal Process., 2017

Tactile array sensor for manipulator based on the barometric chips.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

An enhanced TDoA approach handling multipath interference in Wi-Fi based indoor localization systems.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A 40-80 Gb/s PAM4 wireline transmitter in 65nm CMOS technology.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

An 8.5-12.5GHz wideband LC PLL with dual VCO cores for multi-protocol SerDes.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

An ensemble learning based adaptive algorithm for capsule endoscope image deblocking.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A 25Gb/s serial-link repeater with receiver equalization and transmitter de-emphasis in 0.13μm SiGe BiCMOS.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A new algorithm for fast and accurate moving object detection based on motion segmentation by clustering.
Proceedings of the Fifteenth IAPR International Conference on Machine Vision Applications, 2017

Bi-direction ICP: Fast registration method of point clouds.
Proceedings of the Fifteenth IAPR International Conference on Machine Vision Applications, 2017

Wi-Fi TDoA indoor localization system based on SDR platform.
Proceedings of the IEEE International Symposium on Consumer Electronics, 2017

An energy/bandwidth/area efficient frequency-domain OOK transmitter with phase rotated modulation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A new algorithm for accurate and automatic chessboard corner detection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 0.6V 50-to-145MHz PVT tolerant digital PLL with DCO-dedicated ΔΣ LDO and temperature compensation circuits in 65nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Bare-finger Projector-Camera-Touchpad (PCT) HCI system using color structured light.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

An optical tracker based registration method using feedback for robot-assisted insertion surgeries.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 9.4 pJ/bit 432 MHz 16-QAM/MSK transmitter based on edge-combining power amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 7.9μA 4-bit 4Msps successive approximation phase-domain ADC for GFSK demodulator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

IMU-based Real-time Pose Measurement system for Anterior Pelvic Plane in Total Hip Replacement Surgeries.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017

A 4-40 Gb/s PAM4 transmitter with output linearity optimization in 65 nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A 10 GHz 56 fsrms-integrated-jitter and -247 dB FOM ring-VCO based injection-locked clock multiplier with a continuous frequency-tracking loop in 65 nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A 6.1mW 5Mb/s 2.4GHz transceiver with F-OOK modulation for high bandwidth and energy efficiencies.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

Wireless intracranial pressure monitoring system based on an air pressure sensor.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

Live demonstration: Wireless intracranial pressure monitoring system based on an air pressure sensor.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

Guide image based enhancement method for wireless capsule endoscopy.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

Live demonstration: A real-time measurement system for pose of anterior pelvic plane and implantation angles of prosthesis in THR surgeries.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

A 13-bit 160MS/s pipelined subranging-SAR ADC with low-offset dynamic comparator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

A low-offset dynamic comparator with input offset-cancellation.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

Design of a closed-loop, bi-directional brain-machine-interface integrated on-chip spike sorting.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

System architecture of a smart binaural hearing aid using a mobile computing platform.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 20Mbps 5.8mw QPSK transmitter based on injection locking and Class-E PA for wireless biomedical applications.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
A 5-/20-MHz BW Reconfigurable Quadrature Bandpass CT ΔΣ ADC With AntiPole-Splitting Opamp and Digital I/Q Calibration.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A 70 mW 25 Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset With 40 dB of Equalization in 65 nm CMOS Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A PAPR-Aware Dual-Mode Subgigahertz CMOS Power Amplifier for Short-Range Wireless Communication.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A 77 GHz Frequency Doubling Two-Path Phased-Array FMCW Transceiver for Automotive Radar.
IEEE J. Solid State Circuits, 2016

Simple and robust self-healing technique for millimetre-wave amplifiers.
IET Circuits Devices Syst., 2016

A 28-Gb/s transmitter with 3-tap FFE and T-coil enhanced terminal in 65-nm CMOS technology.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

A 77.1dB/108.9dB SNDR dual-mode delta-sigma modulator.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

High speed serial interface transceiver controller based on JESD204B.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

An 11-bit 200MS/s subrange SAR ADC with charge-compensation-based reference buffer.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Aperture error reduction technique for subrange SAR ADC.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

A wireless image acquisition system for artificial knee implant surgeries.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

An overview of digital-intensive ΔΣ phase-locked loops utilizing 1-bit conversion and modulation.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

A 400MHz 3-10Mbps transceiver IC with ∼0.3 nJ/bit TX/RX energy efficiency for body area applications.
Proceedings of the International SoC Design Conference, 2016

A reconfigurable digital polar transmitter with open-loop phase modulation for Sub-GHz applications.
Proceedings of the 25th IEEE International Symposium on Industrial Electronics, 2016

Measurement of three-dimensional deformation and load using vision-based tactile sensor.
Proceedings of the 25th IEEE International Symposium on Industrial Electronics, 2016

The design of high efficiency energy receiving coil for micro-ball Endoscopy.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A high efficiency single-inductor dual-output buck converter with adaptive freewheel current and hybrid mode control.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A novel autocorrelation-based timing mismatch C alibration strategy in Time-Interleaved ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A reconfigurable IF receiver supporting intra-band non-contiguous carrier aggregation in 65 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A 5-50 Gb/s quarter rate transmitter with a 4-tap multiple-MUX based FFE in 65 nm CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

An algorithm for accurate needle orientation.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

Pose measurement of Anterior Pelvic Plane based on inertial measurement unit in total hip replacement surgeries.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

On the performance of wireless source-location using TDOA measurements under poor geometry.
Proceedings of the 13th IEEE Annual Consumer Communications & Networking Conference, 2016

Color based segmentation in monocular system for prosthesis pose estimation during total hip replacement surgery.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

A wireless charging circuit with high power efficiency and security for implantable devices.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

An image compression algorithm for wireless endoscopy and its ASIC implementation.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

Image enhancement techniques in an image monitoring system for total knee arthroplasty.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

An improved 40 Gb/s CDR with jitter-suppression filters and phase-compensating interpolators.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

A 1.9mW 750kb/s 2.4GHz F-OOK transmitter with symmetric FM template and high-point modulation PLL.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

A 32.9% PAE, 15.3 dBm, 21.6-41.6 GHz power amplifier in 65nm CMOS using coupled resonators.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015
A 0.1-6.0-GHz Dual-Path SDR Transmitter Supporting Intraband Carrier Aggregation in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2015

A Low-Cost UHF RFID System With OCA Tag for Short-Range Communication.
IEEE Trans. Ind. Electron., 2015

A 0.35-0.5-V 18-152 MHz Digitally Controlled Relaxation Oscillator With Adaptive Threshold Calibration in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A 0.1-1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 60-GHz CMOS Dual-Mode Power Amplifier With Efficiency Enhancement at Low Output Power.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A 80 mW 40 Gb/s Transmitter With Automatic Serializing Time Window Search and 2-tap Pre-Emphasis in 65 nm CMOS Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A Lumen Detection-Based Intestinal Direction Vector Acquisition Method for Wireless Endoscopy Systems.
IEEE Trans. Biomed. Eng., 2015

Design of Endoscopic Capsule With Multiple Cameras.
IEEE Trans. Biomed. Circuits Syst., 2015

A Visual-Aided Wireless Monitoring System Design for Total Hip Replacement Surgery.
IEEE Trans. Biomed. Circuits Syst., 2015

An LP/CBP reconfigurable analog baseband circuit for software-defined radio receivers in 65 nm CMOS.
Microelectron. J., 2015

A power-efficient reference buffer with wide swing for switched-capacitor ADC.
Microelectron. J., 2015

A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS.
IEEE J. Solid State Circuits, 2015

A 13.3 mW 500 Mb/s IR-UWB Transceiver With Link Margin Enhancement Technique for Meter-Range Communications.
IEEE J. Solid State Circuits, 2015

A high-PSRR ADPLL with self-regulated GRO TDC and DCO-dedicated voltage regulator.
Proceedings of the VLSI Design, Automation and Test, 2015

Apparent resolution enhancement for near-eye light field display.
Proceedings of the SIGGRAPH Asia 2015 Mobile Graphics and Interactive Applications, 2015

A power-efficient 14-bit 250MS/s pipelined ADC.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

A digital blind background calibration algorithm for pipelined ADC.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

A 40Gb/s 27mW 3-tap closed-loop decision feedback equalizer in 65nm CMOS.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

A 14-bit 200MS/s low-power pipelined flash-SAR ADC.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A delta-sigma-based transmitter utilizing FIR-embedded digital power amplifiers.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A 40Gb/s 39mW 3-tap adaptive closed-loop decision feedback equalizer in 65nm CMOS.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

25.6 A 70.5-to-85.5GHz 65nm phase-locked loop with passive scaling of loop filter.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 0.5-30GHz wideband differential CMOS T/R switch with independent bias and leakage cancellation techniques.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A combined transmitting coil design for high efficiency WPT of endoscopic capsule.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Charge-compensation-based reference technique for switched-capacitor ADCs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Design of a computer-aided visual system for Total Hip Replacement surgery.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A digital power amplifier with FIR-embedded 1-Bit high-order ΔΣ modulation for WBAN polar transmitters.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A high-voltage, energy-efficient, 4-electrode output stage for implantable neural stimulator.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A multi-bit FIR filtering technique for two-point modulators with dedicated digital high-pass modulation path.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A fast AGC method for multimode zero-IF/sliding-IF WPAN/BAN receivers.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOS.
Proceedings of the ESSCIRC Conference 2015, 2015

An 8.2 GHz triple coupling low-phase-noise class-F QVCO in 65nm CMOS.
Proceedings of the ESSCIRC Conference 2015, 2015

Orientation and depth estimation for femoral components using image sensor, magnetometer and inertial sensors in THR surgeries.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

A 4×20-Gb/s 0.86pJ/b/lane 2-tap-FFE source-series-terminated transmitter with far-end crosstalk cancellation and divider-less clock generation in 65nm CMOS.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A 0.1-5.0GHz self-calibrated SDR transmitter with -62.6dBc CIM3 in 65nm CMOS.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A 190mW 40Gbps SerDes transmitter and receiver chipset in 65nm CMOS technology.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

Bowel sound based digestion state recognition using artificial neural network.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

Live demonstration: A smart trial for hip range of motion estimation in total hip replacement surgery.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

Smart trail with camera and inertial measurement unit for intraoperative estimation of hip range of motion in total hip replacement surgery.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

A spread-spectrum clock generator with FIR-embedded binary phase detection and 1-bit high-order ΔΣ modulation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

Dedicated ICs for wearable body sound monitoring.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

A 7.6mW 2Gb/s proximity transmitter for smartphone-mirrored display applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

A frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

A 2.4 GHz two-point Δ-Σ modulator with gain calibration and AFC for WPAN/BAN applications.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A high-speed analog front-end circuit used in a 12bit 1GSps pipeline ADC.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A 0.3V-to-1.1V standard cell library in 40nm CMOS.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A 60-GHz wireless transceiver with dual-mode power amplifier for IEEE 802.11ad in 65nm CMOS.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
Orchestrating Cache Management and Memory Scheduling for GPGPU Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A Multi-Tag Emulator for the UHF RFID System.
IEEE Trans. Instrum. Meas., 2014

Bare-fingers Touch Detection by the Button's Distortion in a Projector-Camera System.
IEEE Trans. Circuits Syst. Video Technol., 2014

A Wide Measurement Range and Fast Update Rate Integrated Interface for Capacitive Sensors Array.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A Reconfigurable Dual-Mode CMOS Power Amplifier With Integrated T/R Switch for 0.1-1.5-GHz Multistandard Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A 0.1-5.0 GHz Reconfigurable Transmitter With Dual-Mode Power Amplifier and Digitally-Assisted Self-Calibration for Private Network Communications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A PSRR Enhancing Method for GRO TDC Based Clock Generation Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A 38- to 40-GHz Current-Reused Active Phase Shifter Based on the Coupled Resonator.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A ΔΣ-TDC-Based Beamforming Method for Vital Sign Detection Radar Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A 77 GHz FMCW radar transmitter with reconfigurable power amplifier in 65 nm CMOS.
Microelectron. J., 2014

A Fast and Accurate Segmentation Method for Ordered LiDAR Point Cloud of Large-Scale Scenes.
IEEE Geosci. Remote. Sens. Lett., 2014

A Hybrid Loop Two-Point Modulator Without DCO Nonlinearity Calibration by Utilizing 1 Bit High-Pass Modulation.
IEEE J. Solid State Circuits, 2014

Introduction to the Special Section on the 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC).
IEEE J. Solid State Circuits, 2014

A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network.
IEEE J. Solid State Circuits, 2014

A high speed multi-level-parallel array processor for vision chips.
Sci. China Inf. Sci., 2014

A massively parallel keypoint detection and description (MP-KDD) algorithm for high-speed vision chip.
Sci. China Inf. Sci., 2014

A low-power DC offset calibration method independent of IF gain for zero-IF receiver.
Sci. China Inf. Sci., 2014

A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

A 3.5-4GHz FMCW radar transceiver design with phase-domain oversampled ranging by utilizing a 1-bit ΔΣ TDC.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

Estimation of the relative pose of the femoral and acetabular components in a visual aided system for total hip replacement surgeries.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

-80dBm∼0dBm dynamic range, 30mV/dB detection sensitivity piecewise RSSI for SDR/CR receivers.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

An on-chip security guard based on zero-power authentication for implantable medical devices.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A smart capsule for in-body pH and temperature continuous monitoring.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

7.3 A 1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

9.2 A 13.3mW 500Mb/s IR-UWB transceiver with link-margin enhancement technique for meter-range communications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

9.3 A 1mW 1Mb/s 7.75-to-8.25GHz chirp-UWB transceiver with low peak-power transmission and fast synchronization capability.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A low-complexity intestinal lumen detection method for wireless endoscopy images.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Fetal heart rate monitoring system with mobile internet.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A high efficiency robust IR-UWB receiver design for high data rate CM-range communications.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A 2.5GHz ADPLL with PVT-insensitive ΔΣ dithered time-to-digital conversion by utilizing an ADDLL.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A wirelessly monitoring system design for Total Hip Replacement surgery.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A new method of detecting fingertip touch for the projector-camera HCI system.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Wireless Micro-Ball endoscopic image enhancement using histogram information.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

An efficiency-enhanced 2.4GHz stacked CMOS power amplifier with mode switching scheme for WLAN applications.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

A 75mW 50Gbps SerDes transmitter with automatic serializing time window search in 65nm CMOS technology.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

Omnidirectional wireless power combination harvest for wireless endoscopy.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

A 0.1-5GHz flexible SDR receiver in 65nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

A 0.1-1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

A fully-integrated reconfigurable dual-band transceiver for short range wireless communication in 180nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

A 0.65V 1.2mW 2.4GHz/400MHz dual-mode phase modulator for mobile healthcare applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

What is a good way to expand a silicon value to a solution value?
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
A 0.6-V to 1-V Audio Delta-Sigma Modulator in 65 nm CMOS with 90.2 dB SNDR at 0.6-V.
VLSI Design, 2013

Reconfigurable FM-UWB transmitter design for robust short range communications.
Telecommun. Syst., 2013

A Phase-Domain ΔΣ Ranging Method for FMCW Radar Receivers.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

A Reconfigurable Sliding-IF Transceiver for 400 MHz/2.4 GHz IEEE 802.15.6/ZigBee WBAN Hubs With Only 21% Tuning Range VCO.
IEEE J. Solid State Circuits, 2013

Exploiting the Task-Pipelined Parallelism of Stream Programs on Many-Core GPUs.
IEICE Trans. Inf. Syst., 2013

A 6.4 Gb/s source synchronous receiver core with variable offset equalizer in 65nm CMOS.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

A 5.2-11.8MHz octa-phase relaxation oscillator for 8-PSK FM-UWB transceiver systems.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

Lifetime tracing of cardiopulmonary sounds with ultra-low-power sound sensor stick connected to wireless mobile network.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

A high-resolution time interval measurement chip in underground positioning system.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

An efficient calibration technique for pipeline ADC.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 0.1-1.5GHz dual-mode Class-AB/Class-F power amplifier in 65nm CMOS.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Heart sound denoising using computational auditory scene analysis for a wearable stethoscope.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

An FM-UWB transceiver with M-PSK subcarrier modulation and regenerative FM demodulation.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A LUT-free DC offset calibration method for removing the PGA-gain-correlated offset residue.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A half rate CDR with DCD cleaning up and quadrature clock calibration for 20Gbps 60GHz communication in 65nm CMOS.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A merged first and second stage for low power pipelined ADC.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A multi-mode complex bandpass filter with gm-assisted power optimization and I/Q calibration.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A high-performance low-power SoC for mobile one-time password applications.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A new finger touch detection algorithm and prototype system architecture for pervasive bare-hand human computer interaction.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A 14-bit pipelined ADC with digital background nonlinearity calibration.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

An efficiency-enhanced wireless power transfer system with segmented transmitting coils for endoscopic capsule.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A PLL/DLL based CDR with ΔΣ frequency tracking and low algorithmic jitter generation.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Live demonstration: A wireless force measurement system for total knee arthroplasty.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Learning to Detect Frame Synchronization.
Proceedings of the Neural Information Processing - 20th International Conference, 2013

Rate distortion Multiple Instance Learning for image classification.
Proceedings of the IEEE International Conference on Image Processing, 2013

A facial expression based continuous emotional state monitoring system with GPU acceleration.
Proceedings of the 10th IEEE International Conference and Workshops on Automatic Face and Gesture Recognition, 2013

A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations.
Proceedings of the ESSCIRC 2013, 2013

An asymmetric dual-channel reconfigurable receiver for GNSS in 180nm CMOS.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

A 1.14mW 750kb/s FM-UWB transmitter with 8-FSK subcarrier modulation.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

A 10-Gb/s simplified transceiver with a quarter-rate 4-tap decision feedback equalizer in 0.18-μm CMOS technology.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

A 10Gb/s analog equalizer in 0.18um CMOS.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
A Gated FM-UWB System With Data-Driven Front-End Power Control.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Power-Scalable, Complex Bandpass/Low-Pass Filter With I/Q Imbalance Calibration for a Multimode GNSS Receiver.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A 1-V 15-Bit Audio ΔΣ-ADC in 0.18 µm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A Two-Hop Wireless Power Transfer System With an Efficiency-Enhanced Power Receiver for Motion-Free Capsule Endoscopy Inspection.
IEEE Trans. Biomed. Eng., 2012

A 1 V, 69-73 GHz CMOS power amplifier based on improved Wilkinson power combiner.
Microelectron. J., 2012

A wirelessly ultra-low-power system for equilibrium measurements in total hip replacement surgery.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

A 6.4 Gb/s data lane design for forwarded clock receiver in 65nm CMOS.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A baseband transceiver for multi-mode and multi-band SoC.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A combined low power SAR capacitance-to-digital / analog-to-digital converter for multisensory system.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A novel clock and data recovery scheme for 10Gbps source synchronous receiver in 65nm CMOS.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A PVT-insensitive self-dithered TDC design by utilizing a ΔΣ DLL.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A programmable low-pass filter with adaptive miller compensation for zero-IF transceiver.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A Time-Frequency Aware Cochlear Implant: Algorithm and System.
Proceedings of the Advances in Neural Networks - ISNN 2012, 2012

A ΔΣ IR-UWB radar with sub-mm ranging capability for human body monitoring systems.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A wide dynamic range and fast update rate integrated interface for capacitive sensors array.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 120dB SNDR audio sigma-delta modulator with an asynchronous SAR quantizer.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A hybrid approach to I/Q imbalance self-calibration in reconfigurable low-IF receivers.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Power-scalable multi-mode reconfigurable continuous-time lowpass/quadrature bandpass sigma-delta modulator for zero/low-IF receivers.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Design of a low-cost low-power baseband-processor for UHF RFID tag with asynchronous design technique.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 12-bit, 270MS/s pipelined ADC with SHA-eliminating front end.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A theoretical and empirical error analysis of mobile 3D data acquisition system.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A wireless force measurement system for Total Knee Arthroplasty.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 9.6Gb/s 5+1-lane source synchronous transmitter in 65nm CMOS technology.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 10Gbps CDR based on phase interpolator for source synchronous receiver in 65nm CMOS.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

The design and implementation of a chipset for the endoscopic Micro-Ball.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A pulse-shaped power amplifier with dynamic bias switching for IR-UWB transmitters.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 0.024 mm<sup>2</sup> 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS.
Proceedings of the 38th European Solid-State Circuit conference, 2012

A 12-bit 110MS/s 4-stage single-opamp pipelined SAR ADC with ratio-based GEC technique.
Proceedings of the 38th European Solid-State Circuit conference, 2012

Research on 2D representation method of wireless Micro-Ball endoscopic images.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

A wirelessly programmable chip for multi-channel neural stimulation.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

A 0.1~4GHz receiver and 0.1~6GHz transmitter with reconfigurable 10~100MHz signal bandwidth in 65nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

A fast computable delay model for subthreshold circuit.
Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012

A method for the generation of small intestine map based on endoscopic Micro-Ball.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012

A flexible attitude system for wireless Micro-Ball endoscopy.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012

An adaptive real-time method for fetal heart rate extraction based on phonocardiography.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012

Design of Micro-Ball endoscopy system.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012

2011
A Continuously Tunable Hybrid LC-VCO PLL With Mixed-Mode Dual-Path Control and Bi-level Delta-Sigma Modulated Coarse Tuning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A 65 nm CMOS fully-integrated dynamic reconfigurable differential power amplifier with high gain in both bands.
Microelectron. J., 2011

Semidigital PLL Design for Low-Cost Low-Power Clock Generation.
J. Electr. Comput. Eng., 2011

Ultra-high-frequency radio frequency identification reader receiver with 10 dBm input P1 dB and -74 dBm sensitivity in 0.18 μm CMOS.
IET Circuits Devices Syst., 2011

A 92.4dB SNDR 24kHz ΔΕ modulator consuming 352μW.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

A wide-tuning quasi-type-I PLL with voltage-mode frequency acquisition aid.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A nanopower CMOS bandgap reference with 30ppm/degree C from -30 degree C to 150 degree C.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Image registration method for 2D representation of wireless Micro-Ball endoscopic images.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 0.13µm CMOS 1.5-to-2.15GHz low power transmitter front-end for SDR applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A relaxation oscillator with multi-phase triangular waveform generation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 1V 15-bit Audio ΔΣ ADC in 0.18µm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A new omnidirectional wireless power transmission solution for the wireless Endoscopic Micro-Ball.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Attitude sensing system design for wireless Micro-Ball endoscopy.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Low-power SoC design for Ligament Balance Measuring System in Total Knee Arthroplasty.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

A dual-channel GPS/Compass/Galileo/GLONASS reconfigurable GNSS receiver in 65nm CMOS.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

An omnidirectional wireless power receiving IC with 93.6% efficiency CMOS rectifier and Skipping Booster for implantable bio-microsystems.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

A digital sliding mode controller for switching power supply converters.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
A Low-Power High-Data-Rate ASK IF Receiver With a Digital-Control AGC Loop.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

An Energy-Efficient ASIC for Wireless Body Sensor Networks in Medical Applications.
IEEE Trans. Biomed. Circuits Syst., 2010

Low power, non invasive UWB systems for WBAN and biomedical applications.
Proceedings of the International Conference on Information and Communication Technology Convergence, 2010

An ultra low power 9-bit 1-MS/s pipelined SAR ADC for bio-medical applications.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

An energy-efficient SoC for closed-loop medical monitoring and intervention.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

Fully-differential low-offset interface for capacitive sensors.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

A high-energy-efficiency link scheme for closed-loop medical monitoring and intervention.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

A low-power remotely-programmable MCU for implantable medical devices.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

A wireless energy link for endoscopy with end-fire helix emitter and Load-Adaptive power converter.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

Power and jitter optimized VCO design using an on-chip supply noise monitoring circuit.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

Reconfigurable, fast AFC technique using code estimation and binary search algorithm for 0.2-6GHz software-defined radio frequency synthesis.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
A Fast-Settling Wideband-IF ASK Baseband Circuit for a Wireless Endoscope Capsule.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

A 0.18-muhboxm CMOS GFSK Analog Front End Using a Bessel-Based Quadrature Discriminator With On-Chip Automatic Tuning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A Wireless Capsule Endoscope System With Low-Power Controlling and Processing ASIC.
IEEE Trans. Biomed. Circuits Syst., 2009

Low-Power Circuits for the Bidirectional Wireless Monitoring System of the Orthopedic Implants.
IEEE Trans. Biomed. Circuits Syst., 2009

New implementation of high linear LNA using derivative superposition method.
Microelectron. J., 2009

An FIR-Embedded Noise Filtering Method for ΔΣ Fractional-N PLL Clock Generators.
IEEE J. Solid State Circuits, 2009

A ΔΣ Fractional-N Synthesizer With Customized Noise Shaping for WCDMA/HSDPA Applications.
IEEE J. Solid State Circuits, 2009

A Hybrid Spur Compensation Technique for Finite-Modulo Fractional-N Phase-Locked Loops.
IEEE J. Solid State Circuits, 2009

A 0.4-to-1.6GHz low-OSR ΔΣ DLL with self-referenced multiphase generation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A Robust Radio Frequency Identification System Enhanced with Spread Spectrum Technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

An Energy Efficient Implementation of On-demand MAC Protocol in Medical Wireless Body Sensor Networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Customized Zero Frequency Control for Hybrid FIR Noise Filtering in SigmaDelta Fractional-N PLL.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Novel Demodulator for Low Modulation Index RF Signal in Passive UHF RFID Tag.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Transient Analysis of Nonlinear Settling Behavior in Charge-pump Phase-locked Loop Design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A fully integrated CMOS UHF RFID reader transceiver for handheld applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
System Design Considerations of Highly-Integrated SigmaDelta fractional-n Frequency synthesizer.
J. Circuits Syst. Comput., 2008

Integrated power management circuit for piezoelectronic generator in wireless monitoring system of orthopaedic implants.
IET Circuits Devices Syst., 2008

A 1GHz Fractional-N PLL Clock Generator with Low-OSR ΔΣ Modulation and FIR-Embedded Noise Filtering.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Low-power IC design for a wireless BCI system.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

An improved method of power control with CMOS class-E power amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Bandwidth extension for ultra-wideband CMOS low-noise amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Power Issues on Circuit Design for Cochlear Implants.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

A low-power IC design for the wireless monitoring system of the orthopedic implants.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Using asynchronous circuits for communications in wireless endoscopic capsule.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Function-based memory partitioning on low power digital signal processor for cochlear implants.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

A low-power RF front-end of passive UHF RFID transponders.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
A Mixed-Loop CMOS Analog GFSK Modulator With Tunable Modulation Index.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Low-Power Transceiver Analog Front-End Circuits for Bidirectional High Data Rate Wireless Telemetry in Medical Endoscopy Applications.
IEEE Trans. Biomed. Eng., 2007

Low power high data rate wireless endoscopy transceiver.
Microelectron. J., 2007

Low-complexity near-lossless image compression method and its application-specific integrated circuit design for a wireless endoscopy capsule system.
J. Electronic Imaging, 2007

A Near-Lossless Image Compression Algorithm Suitable for Hardware Design in Wireless Endoscopy System.
EURASIP J. Adv. Signal Process., 2007

Full custom design of a three-stage amplifier with 5500MHz·pF/mW Performance in 0.18 mum CMO S.
Proceedings of the IFIP VLSI-SoC 2007, 2007

A 2-GHz 6.1-mA Fully-Differential CMOS Phase-Locked Loop.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Design and Implementation of a Low Complexity Near-lossless Image Compression Method for Wireless Endoscopy Capsule System.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

An Incomplete Settling Technique for Pipelined Analog-to-Digital Converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A CMOS class-E Power Amplifiers with Power Control.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Pipelined A/D Conversion Technique with Low INL and DNL.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Process Variation Compensation of a 2.4GHz LNA in 0.18um CMOS Using Digitally Switchable Capacitance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Fractional-N PLL for Digital Clock Generation With an FIR-Embedded Frequency Divider.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Low Power Digital Baseband for Wireless Endoscope Capsule.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Power Harvesting With PZT Ceramics.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Pre-Processing and Vector Quantization Based Approach for CFA Data Compression in Wireless Endoscopy Capsule.
Proceedings of the 2007 IEEE International Symposium on Biomedical Imaging: From Nano to Macro, 2007

A Low Power, Fully Pipelined JPEG-LS Encoder for Lossless Image Compression.
Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, 2007

Design Practice of Power-oriented Integrated Circuits for Biomedical Implant Systems.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
Analysis and design of a low-voltage RF CMOS mixer.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

New implementation of injection locked technique and its application to low phase noise quadrature oscillators.
Microelectron. J., 2006

A Low-Power Digital IC Design Inside the Wireless Endoscopic Capsule.
IEEE J. Solid State Circuits, 2006

A Wideband Frequency-Shift Keying Demodulator for Wireless Neural Stimulation Microsystems.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

A 4MHz Gm-C filter with on-chip frequency automatic tuning.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A new VLSI structure for an improved near-lossless color image compression algorithm inside wireless endoscopy capsule.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An open-source based DSP with enhanced multimedia-processing capacity for embedded applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 3V 110µW 3.1 ppm/°C curvature-compensated CMOS bandgap reference.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 2.4GHz low power wireless transceiver analog front-end for endoscopy capsule system.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A CMOS down-conversion micromixer for IEEE 802.11b WLAN transceivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Cochlear System with Implant DSP.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

Power Analysis for the MOS AC/DC Rectifier of Passive RFID Transponders.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Design of Adaptive Deblocking Filter for H.264/AVC Decoder SOC.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

An Active-RC Complex Filter with Mixed Signal Tuning System for Low-IF Receiver.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
A Novel Solid Neuron-Network Chip Based on Both Biological and Artificial Neural Network Theories.
Proceedings of the Advances in Neural Networks - ISNN 2005, Second International Symposium on Neural Networks, Chongqing, China, May 30, 2005

A novel method of lossy image compression for digital image sensors with Bayer color filter arrays.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Calculation of intermodulation distortion in CMOS transconductance stage.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A new high gain low voltage 1.45 GHz CMOS mixer.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A new near-lossless image compression algorithm suitable for hardware design in wireless endoscopy system.
Proceedings of the 2005 International Conference on Image Processing, 2005

A New Near-Lossless Image Compression Method in Digital Image Sensors with Bayer Color Filter Arrays.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

An ASIC implementation of JPEG2000 codec.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

A monolithic CMOS L band DAB receiver.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
A VLSI architecture of JPEG2000 encoder.
IEEE J. Solid State Circuits, 2004

A new approach for near-lossless and lossless image compression with Bayer color filter arrays.
Proceedings of the Third International Conference on Image and Graphics, 2004

An improved algorithm for rate distortion optimization in JPEG2000 and its integrated circuit implementation.
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2003
A new variable step size LMS algorithm with application to active noise control.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

2002
A DAB transmitter prototype with high flexibility and low cost.
IEEE Trans. Broadcast., 2002

A VLSI architecture of spatial combinative lifting algorithm based 2-D DWT/IDWT.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002


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