Hung-Pin Chen

According to our database, Hung-Pin Chen authored at least 4 papers between 1993 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2004

A 0.8 V CMOS TSPC adiabatic DCVS logic circuit with the bootstrap technique for low-power VLSI.

Hung-Pin Chen, James B. Kuo

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

1996

A new approach of multi-stage fuzzy logic inference.

Hung-Pin Chen, Tai-Ming Parng

Fuzzy Sets Syst., 1996

1994

On Testing Wave Pipelined Circuits.

Jui-Ching Shyur, Hung-Pin Chen, Tai-Ming Parng

Proceedings of the 31st Conference on Design Automation, 1994

1993

A BiCMOS Dynamic Divider Circuit Using a Restoring Iterative Architecture with Carry Look Ahead for CPU VLSI.

James B. Kuo, Hung-Pin Chen, H. J. Huang

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993