Hyeonji Han

According to our database, Hyeonji Han authored at least 2 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 0.036mm² 80Mb/s-to-15.96Gb/s C-PHY and D-PHY Combo Receiver with Background Calibrations in 4nm FinFET.

Woongki Min, Soo-Min Lee, Taejin Jang, Yunsik Jo, Hyoungjoong Kim, Younggyun Oh, Myeong-Cheol Kim, Hyeonji Han, Cheolhwan Lim, Seungjun Lee, Jihoon Lee, Yon Jun Shin, Sangho Kim, Jongwoo Lee

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024

2022

A 64Gb/s Downlink and 32Gb/s Uplink NRZ Wireline Transceiver with Supply Regulation, Background Clock Correction and EOM-based Channel Adaptation for Mid-Reach Cellular Mobile Interface in 8nm FinFET.

Soo-Min Lee, Jihoon Lim, Jaehyuk Jang, Hyoungjoong Kim, Kyunghwan Min, Woongki Min, Hyeonji Han, Gyusik Kim, Jaeyoung Kim, Chulho Kim, Sejun Jeon, Jinhoon Park, Hyunsu Chae, Sangwook Han, Hiep Pham, Xingliang Zhao, Qilin Gu, Chih-Wei Yao, Sangho Kim, Jongwoo Lee

Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022