Hyosup Won

Orcid: 0000-0002-3753-6285

According to our database¹, Hyosup Won authored at least 14 papers between 2014 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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PhD thesis

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On csauthors.net:

Bibliography

2024

A 26-Gb/s Framed-Pulsewidth Modulation Transceiver for Extended Reach Optical Links.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, August, 2024

2023

An 86.71875GHz RF transceiver for 57.8125Gb/s waveguide links with a CDR-assisted carrier synchronization loop in 28nm.

[BibT_eX]

[DOI]

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022

A 25.78125Gbps Bi-directional Transceiver with Framed-Pulsewidth Modulation (FPWM) for Extended Reach Optical Links in 28nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A 50Gb/s PAM-4 Bi-Directional Plastic Waveguide Link with Carrier Synchronization Using PI-Based Costas Loop.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2018

A 28Gb/s transceiver with chirp-managed EDC for DML systems.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10- and 40-GbE Links.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2017

2016

A 4×10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

2015

An Automatic Loop Gain Control Algorithm for Bang-Bang CDRs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 0.87 W Transceiver IC for 100 Gigabit Ethernet in 40 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2015

A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards.

[BibT_eX]

[DOI]

Proceedings of the Symposium on VLSI Circuits, 2015

An on-chip stochastic sigma-tracking eye-opening monitor for BER-optimal adaptive equalization.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

0.6-2.7-Gb/s Referenceless Parallel CDR With a Stochastic Dispersion-Tolerant Frequency Acquisition Technique.

[BibT_eX]

[DOI]

Jinho Han

Hyosup Won

Hyeon-Min Bae

IEEE Trans. Very Large Scale Integr. Syst., 2014

8.1 A 6Gb/s transceiver with a nonlinear electronic dispersion compensator for directly modulated distributed-feedback lasers.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Hyosup Won

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