Hyunggyun Yang

According to our database1, Hyunggyun Yang authored at least 3 papers between 2013 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
A fully associative, tagless DRAM cache.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2014
Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems.
Proceedings of the International Conference for High Performance Computing, 2014

2013
Building Fast, Dense, Low-Power Caches Using Erasure-Based Inline Multi-bit ECC.
Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013


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