Idranil Sen Gupta

According to our database, Idranil Sen Gupta authored at least 6 papers between 1992 and 1997.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

1997

Design of t-UED/AUED Codes from Berger's AUED Code.

Gosta Pada Biswas, Idranil Sen Gupta

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

1995

A Low-Cost High-Capacity Associative Memory Design Using Cellular Automata.

Dipanwita Roy Chowdhury, Idranil Sen Gupta, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1995

PLA based synthesis and testing of hazard free logic.

U. K. Bhattacharyya, Idranil Sen Gupta, S. Shyama Nath, P. Dutta

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

Generalized modular design of testable m-out-of-n code checker.

Gosta Pada Biswas, Idranil Sen Gupta

Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1994

Design of CAECC-Cellular Automata Based Error Correcting Code.

Dipanwita Roy Chowdhury, Saugata Basu, Idranil Sen Gupta, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1994

1992

A Novel Scheme for Designing Error Correcting Codes Using Cellular Automata.

Dipanwita Roy Chowdhury, Saugata Basu, Idranil Sen Gupta, Parimal Pal Chaudhuri

Proceedings of the Fifth International Conference on VLSI Design, 1992