Parimal Pal Chaudhuri

According to our database, Parimal Pal Chaudhuri authored at least 123 papers between 1985 and 2022.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2022

Analysis of coronavirus envelope protein with cellular automata model.

Raju Hazari, Parimal Pal Chaudhuri

Int. J. Parallel Emergent Distributed Syst., 2022

Cellular Automata Model for Non-Structural Proteins Comparing Transmissibility and Pathogenesis of SARS Covid (CoV-2, CoV) and MERS Covid.

Raju Hazari, Parimal Pal Chaudhuri

CoRR, 2022

Analysis of Coronavirus Envelope Protein with Cellular Automata (CA) Model.

Raju Hazari, Parimal Pal Chaudhuri

CoRR, 2022

2018

Cellular Automata Model for Proteomics and Its Application in Cancer Immunotherapy.

Soumyabrata Ghosh, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2018

A New Kind of Computational Biology - Cellular Automata Based Models for Genomics and Proteomics

Parimal Pal Chaudhuri, Soumyabrata Ghosh, Adip Dutta, Somshubhro Pal Choudhury

Springer, ISBN: 978-981-13-1638-8, 2018

2014

Cellular Automata (CA) Model for Primality Test.

Nirmalya Sundar Maiti, Soumyabrata Ghosh, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2014

Cellular Automata Model for Protein Structure Synthesis (PSS).

Soumyabrata Ghosh, Nirmalya Sundar Maiti, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2014

2012

Rule Vector Graph (RVG) To Design Linear Time Algorithm for Identifying the Invertibility of Periodic-Boundary Three Neighborhood Cellular Automata.

Nirmalya Sundar Maiti, Soumyabrata Ghosh, Biplab K. Sikdar, Parimal Pal Chaudhuri

J. Cell. Autom., 2012

Theory and Application of Restricted Five Neighborhood Cellular Automata (R5NCA) for Protein Structure Prediction.

Soumyabrata Ghosh, Nirmalya Sundar Maiti, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2012

2011

On Invertible Three Neighborhood Null-Boundary Uniform Cellular Automata.

Soumyabrata Ghosh, Nirmalya Sundar Maiti, Parimal Pal Chaudhuri, Biplab K. Sikdar

Complex Syst., 2011

2010

Linear Time Algorithm for Identifying the Invertibility of Null-Boundary Three Neighborhood Cellular Automata.

Nirmalya Sundar Maiti, Soumyabrata Ghosh, Shiladitya Munshi, Parimal Pal Chaudhuri

Complex Syst., 2010

Programmable Cellular Automata (PCA) Based Advanced Encryption Standard (AES) Hardware Architecture.

Nirmalya Sundar Maiti, Soumyabrata Ghosh, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2010

Theory and Application of Equal Length Cycle Cellular Automata (ELCCA) for Enzyme Classification.

Soumyabrata Ghosh, Tirthankar Bachhar, Nirmalya Sundar Maiti, Indrajit Mitra, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2010

2008

Fault Diagnosis of Electronic Circuits Using Cellular Automata Based Pattern Classifier.

Pradipta Maji, Parimal Pal Chaudhuri

Proceedings of the Soft Computing Applications in Industry, 2008

An Analytical Framework for Characterizing Restricted Two Dimensional Cellular Automata Evolution.

Shiladitya Munshi, Nirmalya Sundar Maiti, Deepan Ray, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri

J. Cell. Autom., 2008

Non-uniform cellular automata based associative memory: Evolutionary design and basins of attraction.

Pradipta Maji, Parimal Pal Chaudhuri

Inf. Sci., 2008

Exploring Cycle Structures of Additive Cellular Automata.

Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaudhuri

Fundam. Informaticae, 2008

2007

RBFFCA: A Hybrid Pattern Classifier Using Radial Basis Function and Fuzzy Cellular Automata.

Pradipta Maji, Parimal Pal Chaudhuri

Fundam. Informaticae, 2007

Design of Response-Pattern Classi er for Fault Diagnosis of Electronic Circuits.

Pradipta Maji, Parimal Pal Chaudhuri

Proceedings of the 3rd Indian International Conference on Artificial Intelligence, 2007

Probabilistic Cellular Automata Model for Identification of CpG island in DNA String.

Soumyabrata Ghosh, Nizamuddin Laskar, Sourav Mahapatra, Parimal Pal Chaudhuri

Proceedings of the 3rd Indian International Conference on Artificial Intelligence, 2007

2006

An Analytical Formulation for Cellular Automata (CA) Based Solution of Density Classification Task (DCT).

Nirmalya Sundar Maiti, Shiladitya Munshi, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2006

2005

Fault diagnosis of VLSI circuits with cellular automata based pattern classifier.

Biplab K. Sikdar, Niloy Ganguly, Parimal Pal Chaudhuri

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Fuzzy Cellular Automata for Modeling Pattern Classifier.

Pradipta Maji, Parimal Pal Chaudhuri

IEICE Trans. Inf. Syst., 2005

Design of Nonlinear CA Based TPG Without Prohibited Pattern Set In Linear Time.

Sukanta Das, Anirban Kundu, Biplab K. Sikdar, Parimal Pal Chaudhuri

J. Electron. Test., 2005

2004

Design and characterization of cellular automata based associative memory for pattern recognition.

Niloy Ganguly, Pradipta Maji, Biplab K. Sikdar, Parimal Pal Chaudhuri

IEEE Trans. Syst. Man Cybern. Part B, 2004

Synthesis of programmable multi-input current-mode linear analog circuits.

Baidya Nath Ray, Prasanta Kumar Nandi, Parimal Pal Chaudhuri

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Generation of test patterns without prohibited pattern set.

Biplab K. Sikdar, Niloy Ganguly, Parimal Pal Chaudhuri

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Cellular Automata Based Pattern Classifying Machine for Distributed Data Mining.

Pradipta Maji, Parimal Pal Chaudhuri

Proceedings of the Neural Information Processing, 11th International Conference, 2004

FMACA: A Fuzzy Cellular Automata Based Pattern Classifier.

Pradipta Maji, Parimal Pal Chaudhuri

Proceedings of the Database Systems for Advances Applications, 2004

Nonlinear CA Based Scalable Design of On-Chip TPG for Multiple Cores.

Sukanta Das, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004

An efficient design of non-linear <i>CA</i> based PRPG for VLSI circuit testing.

Sukanta Das, Debdas Dey, Subhayan Sen, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

Cellular Automata Based Encompression Technology for Voice Data.

Chandrama Shaw, Pradipta Maji, Sourav Saha, Biplab K. Sikdar, Samir Roy, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2004

Cellular Automata Evolution for Pattern Classification.

Pradipta Maji, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2004

Cellular Automata Evolution for Distributed Data Mining.

Pradipta Maji, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2004

Characterization of Reachable/Nonreachable Cellular Automata States.

Sukanta Das, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2004

2003

Error correcting capability of cellular automata based associative memory.

Pradipta Maji, Niloy Ganguly, Parimal Pal Chaudhuri

IEEE Trans. Syst. Man Cybern. Part A, 2003

Theory and Application of Cellular Automata For Pattern Classification.

Pradipta Maji, Chandrama Shaw, Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaudhuri

Fundam. Informaticae, 2003

A Pipeline Architecture for Encompression (Encryption + Compression) Technology.

Chandrama Shaw, Debashis Chatterji, Pradipta Maji, Subhayan Sen, B. N. Roy, Parimal Pal Chaudhuri

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Cryptosystem Designed for Embedded System Security.

Subhayan Sen, Sk. Iqbal Hossain, Kabirul Islam, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Synthesis Of Programmable Current Mode Linear Analog Circuit.

Baidya Nath Ray, Parimal Pal Chaudhuri, Prasanta Kumar Nandi, P. K. Ghosh

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Design Of A Universal BIST (UBIST) Structure.

Sukanta Das, Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Application of Fuzzy Cellular Automata (FCA) For Modeling Tree-Structured Pattern Classifier.

Pradipta Maji, Rishi Nandi, Parimal Pal Chaudhuri

Proceedings of the 1st Indian International Conference on Artificial Intelligence, 2003

Non-Linear Celluar Automata Based PRPG Design (Without Prohibited Pattern Set) In Linear Time Complexity.

Sukanta Das, Anirban Kundu, Subhayan Sen, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

2002

Design of hierarchical cellular automata for on-chip test pattern generator.

Biplab K. Sikdar, Niloy Ganguly, Parimal Pal Chaudhuri

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Efficient synthesis of OTA network for linear analog functions.

Baidya Nath Ray, Parimal Pal Chaudhuri, Prasanta Kumar Nandi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Theory of Extended Linear Machines.

Kolin Paul, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri

IEEE Trans. Computers, 2002

Generalized Multiple Attractor Cellular Automata (GMACA) Model for Associative Memory.

Niloy Ganguly, Pradipta Maji, Biplab K. Sikdar, Parimal Pal Chaudhuri

Int. J. Pattern Recognit. Artif. Intell., 2002

Test Solution for OTA Based Analog Circuits.

Baidya Nath Ray, Parimal Pal Chaudhuri, Prasanta Kumar Nandi

Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Design of an On-Chip Test Pattern Generator without Prohibited Pattern Set (PPS).

Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Cellular Automata Based Cryptosystem (CAC).

Subhayan Sen, Chandrama Shaw, Dipanwita Roy Chowdhury, Niloy Ganguly, Parimal Pal Chaudhuri

Proceedings of the Information and Communications Security, 4th International Conference, 2002

An Evolutionary Strategy To Design An On-Chip Test Pattern Generator Without Prohibited Pattern Set (PPS).

Niloy Ganguly, Anindyasundar Nandi, Sukanta Das, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002

Characterization of Non-linear Cellular Automata Model for Pattern Recognition.

Niloy Ganguly, Pradipta Maji, Arijit Das, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the Advances in Soft Computing, 2002

Cellular Automata Based Authentication (CAA).

Monalisa Mukherjee, Niloy Ganguly, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2002

Cellular Automata Machine for Pattern Recognition.

Pradipta Maji, Niloy Ganguly, Sourav Saha, Anup K. Roy, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2002

Evolving Cellular Automata as Pattern Classifier.

Niloy Ganguly, Pradipta Maji, Sandip Dhar, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the Cellular Automata, 2002

2001

Cellular Automata-Based Recursive Pseudoexhaustive Test Pattern Generator.

Prabir Dasgupta, Santanu Chattopadhyay, Parimal Pal Chaudhuri, Indranil Sengupta

IEEE Trans. Computers, 2001

Hierarchical Cellular Automata As An On-Chip Test Pattern Generator.

Biplab K. Sikdar, Purnabha Majumder, Monalisa Mukherjee, Parimal Pal Chaudhuri, Debesh K. Das, Niloy Ganguly

Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

Design Of Multiple Attractor Gf (2p) Cellular AutomataFor Diagnosis Of Vlsi Circuits.

Biplab K. Sikdar, Purnabha Majumder, Parimal Pal Chaudhuri, Niloy Ganguly

Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

Evolving Cellular Automata Based Associative Memory for Pattern Recognition.

Niloy Ganguly, Arijit Das, Pradipta Maji, Biplab K. Sikdar, Parimal Pal Chaudhuri

Proceedings of the High Performance Computing - HiPC 2001, 8th International Conference, 2001

Multiple Attractor Cellular Automata for Hierarchical Diagnosis of VLSI Circuits.

Biplab K. Sikdar, Niloy Ganguly, Aniket Karmakar, Subha Sankar Chowdhury, Parimal Pal Chaudhuri

Proceedings of the 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, 2001

Cellular automata as a built in self test structure.

Biplab K. Sikdar, Debesh K. Das, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee, Parimal Pal Chaudhuri

Proceedings of ASP-DAC 2001, 2001

2000

Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator.

Biplab K. Sikdar, Kolin Paul, Gosta Pada Biswas, Parimal Pal Chaudhuri, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Design of OTA Based Field Programmable Analog Array.

Baidya Nath Ray, Parimal Pal Chaudhuri, Prasanta Kumar Nandi

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Scalable Pipelined Micro-Architecture for Wavelet Transform.

Kolin Paul, Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Theory and Applications of Cellular Automata for VLSI Design and Testing.

Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury, Kolin Paul, Biplab K. Sikdar

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Fsimac: a fault simulator for asynchronous sequential circuits.

Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, Parimal Pal Chaudhuri, Rob Roy

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder.

Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri

Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

1999

A VLSI Architecture for On-Line Image Decompression Using GF(28) Cellular Automata.

Kolin Paul, P. Dutta, Dipanwita Roy Chowdhury, Prasanta Kumar Nandi, Parimal Pal Chaudhuri

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

A VLSI Architecture for Cellular Automata Based Reed-Solomon Decoder.

Sukumar Nandi, Ch. Rambabu, Parimal Pal Chaudhuri

Proceedings of the 1999 International Symposium on Parallel Architectures, 1999

Cellular Automata Based Transform Coding for Image Compression.

Kolin Paul, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri

Proceedings of the High Performance Computing, 1999

1998

Cellular-Automata-Array-Based Diagnosis of Board Level Faults.

Santanu Chattopadhyay, Dipanwita Roy Chowdhury, Subarna Bhattacharjee, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1998

Efficient Signatures with Linear Space Complexity for Detecting Boolean Function Equivalence.

Santanu Chattopadhyay, Parimal Pal Chaudhuri

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

Genetic Algorithm Based Approach for Integrated State Assignment and Flipflop Selection in Finite State Machine Synthesis.

Santanu Chattopadhyay, Parimal Pal Chaudhuri

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

Theory and Application of Multiple Attractor Cellular Automata for Fault Diagnosis.

Kolin Paul, A. Roy, Prasanta Kumar Nandi, B. N. Roy, M. Deb Purkayastha, Santanu Chattopadhyay, Parimal Pal Chaudhuri

Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1997

KGPMIN: an efficient multilevel multioutput AND-OR-XOR minimizer.

Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Reply to Comments on "Theory and Application of Cellular Automata in Cryptography".

Sukumar Nandi, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1997

Parallel Decoder for Cellular Automata Based Byte Error Correcting Code.

Santanu Chattopadhyay, Parimal Pal Chaudhuri

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

A Parallel Architecture for Video Compression.

Partha Sarathi Bhattacharjee, Sajal K. Das, Debashis Saha, D. Roychowdhury, Parimal Pal Chaudhuri

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

1996

CAA Decoder for Cellular Automata Based Byte Error Correcting Code.

Koppolu Sasidhar, Santanu Chattopadhyay, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1996

Analysis of Periodic and Intermediate Boundary 90/150 Cellular Automata.

Sukumar Nandi, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1996

Synthesis of Highly Testable Fixed-Polarity AND-XOR Canonical Networks-A Genetic Algorithm-Based Approach.

Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1996

Theory and Application of Nongroup Cellular Automata for Synthesis of Easily Testable Finite State Machines.

Supratik Chakraborty, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1996

Programmable cellular automata based testbed for fault diagnosis in VLSI circuits.

Sukumar Nandi, Santanu Chattopadhyay, Parimal Pal Chaudhuri

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Architecture of a VLSI Chip for Modeling Amino Acid Sequence in Proteins.

S. Mitra, S. Das, Parimal Pal Chaudhuri, Sukumar Nandi

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Cellular automata based architecture of a database query processor.

Santanu Chattopadhyay, S. Mitra, Parimal Pal Chaudhuri

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

A VLSI architecture for cellular automata based parallel data compression.

Subarna Bhattacharjee, J. Bhattacharya, U. Raghavendra, Debashis Saha, Parimal Pal Chaudhuri

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

An efficient encoding algorithm for image compression hardware based on cellular automata.

Subarna Bhattacharjee, U. Raghavendra, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri

Proceedings of the 3rd International Conference on High Performance Computing, 1996

1995

CA-Based Byte Error-Correcting Code.

Dipanwita Roy Chowdhury, Indranil Sengupta, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1995

A Low-Cost High-Capacity Associative Memory Design Using Cellular Automata.

Dipanwita Roy Chowdhury, Idranil Sen Gupta, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1995

Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture.

Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

Board level fault diagnosis using cellular automata array.

Santanu Chattopadhyay, Dipanwita Roy Chowdhury, Subarna Bhattacharjee, Parimal Pal Chaudhuri

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

Theory and applications of cellular automata for synthesis of easily testable combinational logic.

Sukumar Nandi, Parimal Pal Chaudhuri

Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

Panel: New Research Problems in the Emerging Test Technology.

Vishwani D. Agrawal, Bernard Courtois, Fumiyasu Hirose, Sandip Kundu, Chung-Len Lee, Yinghua Min, Parimal Pal Chaudhuri

Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1994

Theory and Applications of Cellular Automata in Cryptography.

Sukumar Nandi, B. K. Kar, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1994

Design of CAECC-Cellular Automata Based Error Correcting Code.

Dipanwita Roy Chowdhury, Saugata Basu, Idranil Sen Gupta, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1994

A class of two-dimensional cellular automata and their applications in random pattern testing.

Dipanwita Roy Chowdhury, Indranil Sengupta, Parimal Pal Chaudhuri

J. Electron. Test., 1994

A CAD Tool for Design of On-Chip Store & Generate Scheme.

Sukumar Nandi, Vamsi Boppana, Parimal Pal Chaudhuri

Proceedings of the Seventh International Conference on VLSI Design, 1994

Architecture for VLSI Design of CA Based Byte Error Correcting Code Decoders.

Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri

Proceedings of the Seventh International Conference on VLSI Design, 1994

1993

Vector Space Theoretic Analysis of Additive Cellular Automata and Its Application for Pseudoexhaustive Test Pattern Generation.

Aloke K. Das, Parimal Pal Chaudhuri

IEEE Trans. Computers, 1993

On explicit expressions in additive cellular automata theory.

B. K. Kar, A. Gupta, Parimal Pal Chaudhuri

Inf. Sci., 1993

Characterization of two-dimensional cellular automata using matrix algebra.

Dipanwita Roy Chowdhury, P. Subbarao, Parimal Pal Chaudhuri

Inf. Sci., 1993

Estimating the Complexity of Synthesized Designs from FSM Specifications.

Biswadip Mitra, Preeti Ranjan Panda, Parimal Pal Chaudhuri

IEEE Des. Test Comput., 1993

Delay Fault Test Generation with Cellular Automata.

Sukumar Nandi, Vamsi Boppana, Supratik Chakraborty, Parimal Pal Chaudhuri, Samir Roy

Proceedings of the Sixth International Conference on VLSI Design, 1993

A Scheme for Synthesizing Testable VLSI Designs with Minimum Area Overhead.

Biswadip Mitra, Parimal Pal Chaudhuri

Proceedings of the Sixth International Conference on VLSI Design, 1993

A Novel Scheme for Synthesis of Easily Testable Finite State Machines Using Cellular Automata.

Susanta Misra, Biswadip Mitra, Parimal Pal Chaudhuri

Proceedings of the Sixth International Conference on VLSI Design, 1993

Synthesis of Self-Checking Sequential Machines Using Cellular Automata.

Dipanwita Roy Chowdhury, Supratik Chakraborty, Parimal Pal Chaudhuri

Proceedings of the Sixth International Conference on VLSI Design, 1993

1992

On characterization of cellular automata with matrix algebra.

Aloke K. Das, A. Sanyal, Parimal Palchaudhuri

Inf. Sci., 1992

On characterization of state transition graph of additive cellular automata based on depth.

Aloke K. Das, Tapas K. Nayak, Parimal Pal Chaudhuri

Inf. Sci., 1992

An Efficient State Assignment Technique using Least Commitment and Constraint Propagation Techniques.

Biswadip Mitra, Parimal Pal Chaudhuri

Proceedings of the Fifth International Conference on VLSI Design, 1992

Combined Synthesis of Easily Testable Datapath and Control Designs.

Biswadip Mitra, Parimal Pal Chaudhuri

Proceedings of the Fifth International Conference on VLSI Design, 1992

Synthesis of Self-Testable Sequential Logic Using Programmable Cellular Automata.

Susanta Misra, Biswadip Mitra, S. Sengupta, Parimal Pal Chaudhuri

Proceedings of the Fifth International Conference on VLSI Design, 1992

A Novel Scheme for Designing Error Correcting Codes Using Cellular Automata.

Dipanwita Roy Chowdhury, Saugata Basu, Idranil Sen Gupta, Parimal Pal Chaudhuri

Proceedings of the Fifth International Conference on VLSI Design, 1992

1991

A Flexible Scheme for State Assignment Based on Characteristics of the FSM.

Biswadip Mitra, Preeti Ranjan Panda, Parimal Pal Chaudhuri

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990

Signature analysers based on additive cellular automata.

Aloke K. Das, Debanjan Saha, A. Roy Chowdhury, Susanta Misra, Parimal Pal Chaudhuri

Proceedings of the 20th International Symposium on Fault-Tolerant Computing, 1990

1989

Design of Testable VLSI Circuits with Minumum Area Overhead.

Prasad R. Chalasani, Sudipta Bhawmik, Anurag Acharya, Parimal Palchaudhuri

IEEE Trans. Computers, 1989

Expert system to configure global design for testability structure in a VLSI circuit.

Sudipta Bhawmik, Parimal Pal Chaudhuri

Microprocess. Microsystems, 1989

An efficient on-chip deterministic test pattern generation scheme.

Aloke K. Das, Parimal Pal Chaudhuri

Microprocessing and Microprogramming, 1989

KIDLAN: A hardware description language.

Anurag Acharya, Sudipta Bhawmik, C. R. K. Prasad, Parimal Palchaudhuri

Microprocessing and Microprogramming, 1989

Selecting test methodologies for PLAs and random logic modules in VLSI circuits - an expert systems approach.

Sudipta Bhawmik, V. K. Narang, Parimal Pal Chaudhuri

Integr., 1989

DFT Expert: designing testable VLSI circuits.

Sudipta Bhawmik, Parimal Palchaudhuri

IEEE Des. Test, 1989

1988

DFTEXPERT: An Expert System for Design of Testable VLSI Circuits.

Sudipta Bhawmik, Parimal Pal Chaudhuri

Proceedings of the First International Conference on Industrial & Engineering Applications of Artificial Intelligence & Expert Systems, IEA/AIE 1988, June 1-3, 1988, Tullahoma, TN, USA. ACM, 1988, 1988

1986

A Divide and Conquer Testing Strategy for Detection of Multiple Faults by SFDTS.

J. S. R. Subrahmanyam, Parimal Pal Chaudhuri

Proceedings of the Proceedings International Test Conference 1986, 1986

1985

Design of a 'T' Fault Repairable Multiprocessor System.

J. S. R. Subrahmanium, Parimal Pal Chaudhuri, Pabitra Pal Chaudhuri

Proceedings of the 5th International Conference on Distributed Computing Systems, 1985