Dipanwita Roy Chowdhury

According to our database1, Dipanwita Roy Chowdhury authored at least 172 papers between 1992 and 2024.

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Bibliography

2024
Intrusion detection for power grid: a review.
Int. J. Inf. Sec., April, 2024

2023
A cluster-based practical key recovery attack on reduced-round AES using impossible-differential cryptanalysis.
J. Supercomput., April, 2023

Deep Learning based Differential Classifier of PRIDE and RC5.
IACR Cryptol. ePrint Arch., 2023

Security Analysis of WG-7 Lightweight Stream Cipher against Cube Attack.
CoRR, 2023

Efficient Algorithms for Modeling SBoxes Using MILP.
CoRR, 2023

Unmasking the Dominant Threat of Data Manipulation Attack on Implantable Cardioverter Defibrillators.
Proceedings of the 20th Annual International Conference on Privacy, Security and Trust, 2023

Security Analysis of WAGE Against Division Property Based Cube Attack.
Proceedings of the Information Security Practice and Experience, 2023

New Techniques for Modeling SBoxes: An MILP Approach.
Proceedings of the Cryptology and Network Security - 22nd International Conference, 2023

2022
EnCash: An Authenticated Encryption Scheme Using Cellular Automata.
J. Cell. Autom., 2022

A Deep Neural Differential Distinguisher for ARX based Block Cipher.
IACR Cryptol. ePrint Arch., 2022

HARPOCRATES: An Approach Towards Efficient Encryption of Data-at-rest.
IACR Cryptol. ePrint Arch., 2022

Parallel and Distributed Implementations of the Wiedemann and the Block-Wiedemann Methods over GF(2).
Proceedings of the 19th International Conference on Security and Cryptography, 2022

2021
An Attack on Linear Scan Chains for Stream Ciphers and the Impossibility of Simple Countermeasures.
J. Hardw. Syst. Secur., 2021

Synthesis of Maximum Length Cellular Automata with Nonlinearity Injections.
J. Cell. Autom., 2021

Design of fault-resilient S-boxes for AES-like block ciphers.
Cryptogr. Commun., 2021

CArrency: An Energy-Efficient Proof-of-Work Scheme for Crypto-Currencies.
Proceedings of the Seventh International Conference on Mathematics and Computing, 2021

Image Encryption with Parallel Evolution of 2-D Cellular Automata.
Proceedings of the Seventh International Conference on Mathematics and Computing, 2021

2020
Preventing Differential Fault Analysis Attack on AEGIS Family of Ciphers.
Proceedings of the Sixth International Conference on Mathematics and Computing, 2020

A Family of Subfield Hyperelliptic Curves for Use in Cryptography.
Proceedings of the Information and Communications Security - 22nd International Conference, 2020

2019
Internal differential fault analysis of parallelizable ciphers in the counter-mode.
J. Cryptogr. Eng., 2019

Dinamite: internal differential match-in-the-end attack on eight-round PAEQ.
IET Inf. Secur., 2019

An Efficient Parallel Implementation of Impossible-Differential Cryptanalysis for Five-Round AES-128.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2019

Preventing Fault Attack on Stream Ciphers by Fault Detection and Correction.
Proceedings of the Fifth International Conference on Mathematics and Computing, 2019

Design of Hash Function Using Two Dimensional Cellular Automata.
Proceedings of the Fifth International Conference on Mathematics and Computing, 2019

NCASH: Nonlinear Cellular Automata-based Hash function.
Proceedings of the Fifth International Conference on Mathematics and Computing, 2019

RACE: Randomized Counter Mode of Authenticated Encryption using Cellular Automata.
Proceedings of the 16th International Joint Conference on e-Business and Telecommunications, 2019

An Efficient Hardware Design for Combined AES and AEGIS.
Proceedings of the Eighth International Conference on Emerging Security Technologies, 2019

On the Security of the Double-Block-Length Hash Function NCASH.
Proceedings of the Applications and Techniques in Information Security, 2019

2018
Scan-based side channel attack on stream ciphers and its prevention.
J. Cryptogr. Eng., 2018

Design and Analysis of Some Cryptographically Robust Non-uniform Nonlinear Cellular Automata.
J. Cell. Autom., 2018

Achieving Better Security Using Nonlinear Cellular Automata as a Cryptographic Primitive.
Proceedings of the Mathematics and Computing - 4th International Conference, 2018

2017
Gain: Practical Key-Recovery Attacks on Round-Reduced PAEQ.
J. Hardw. Syst. Secur., 2017

Preventing fault attacks using fault randomisation with a case study on AES.
Int. J. Appl. Cryptogr., 2017

SymSum: Symmetric-Sum Distinguishers Against Round Reduced SHA3.
IACR Cryptol. ePrint Arch., 2017

ZETA: Towards Tagless Authenticated Encryption.
IACR Cryptol. ePrint Arch., 2017

Study of Five-Neighborhood Linear Hybrid Cellular Automata and Their Synthesis.
Proceedings of the Mathematics and Computing - Third International Conference, 2017

On the Practical Implementation of Impossible Differential Cryptanalysis on Reduced-Round AES.
Proceedings of the Applications and Techniques in Information Security, 2017

On the Security of Designing a Cellular Automata Based Stream Cipher.
Proceedings of the Information Security and Privacy - 22nd Australasian Conference, 2017

2016
Prevention of Fault Attacks in Cellular Automata Based Stream Ciphers.
J. Cell. Autom., 2016

EnCounter: On Breaking the Nonce Barrier in Differential Fault Analysis with a Case-Study on PAEQ.
IACR Cryptol. ePrint Arch., 2016

SCARAB: A continuous authentication scheme for biomedical application.
Proceedings of the 14th Annual Conference on Privacy, Security and Trust, 2016

FResCA: A Fault-Resistant Cellular Automata Based Stream Cipher.
Proceedings of the Cellular Automata, 2016

2015
Four Neighbourhood Cellular Automata as Better Cryptographic Primitives.
IACR Cryptol. ePrint Arch., 2015

Scope: On the Side Channel Vulnerability of Releasing Unverified Plaintexts.
Proceedings of the Selected Areas in Cryptography - SAC 2015, 2015

Diagonal fault analysis of Gr⊘stl in dedicated MAC mode.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

Preventing fault attack on stream cipher using randomization.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

Preventing Fault Attacks Using Fault Randomization with a Case Study on AES.
Proceedings of the Information Security and Privacy - 20th Australasian Conference, 2015

2014
New algorithms for batch verification of standard ECDSA signatures.
J. Cryptogr. Eng., 2014

Leakage Squeezing Using Cellular Automata and Its Application to Scan Attack.
J. Cell. Autom., 2014

CASTREAM: A High-speed, Secure Stream Cipher Suitable for Both Hardware and Software.
J. Cell. Autom., 2014

A Generic Scan Attack on Hardware based eStream Winners.
IACR Cryptol. ePrint Arch., 2014

Differential Fault Analysis of MICKEY Family of Stream Ciphers.
IACR Cryptol. ePrint Arch., 2014

Fault Analysis of Grain Family of Stream Ciphers.
IACR Cryptol. ePrint Arch., 2014

AEC: A Practical Scheme for Authentication with Error Correction.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2014

CASH: Cellular Automata Based Parameterized Hash.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2014

Randomized Batch Verification of Standard ECDSA Signatures.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2014

EscApe: Diagonal Fault Analysis of APE.
Proceedings of the Progress in Cryptology - INDOCRYPT 2014, 2014

Practical Distinguishers against 6-Round Keccak-f Exploiting Self-Symmetry.
Proceedings of the Progress in Cryptology - AFRICACRYPT 2014, 2014

Inapplicability of Fault Attacks against Trivium on a Cellular Automata Based Stream Cipher.
Proceedings of the Cellular Automata, 2014

A Scalable Method for Constructing Non-linear Cellular Automata with Period 2 n - 1.
Proceedings of the Cellular Automata, 2014

2013
Secure Dual-Core Cryptoprocessor for Pairings Over Barreto-Naehrig Curves on FPGA Platform.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Rain: Reversible Addition with Increased Nonlinearity.
Int. J. Netw. Secur., 2013

First-order DPA Vulnerability of Rijndael: Security and Area-delay Optimization Trade-off.
Int. J. Netw. Secur., 2013

CAR30: A new scalable stream cipher with rule 30.
Cryptogr. Commun., 2013

Differential Fault Analysis of MICKEY-128 2.0.
Proceedings of the 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2013

Leakage Squeezing Using Cellular Automata.
Proceedings of the Cellular Automata and Discrete Complex Systems, 2013

2012
CAvium - Strengthening Trivium Stream Cipher Using Cellular Automata.
J. Cell. Autom., 2012

Using Randomizers for Batch Verification of ECDSA Signatures.
IACR Cryptol. ePrint Arch., 2012

Efficient FPGA Implementation of Montgomery Multiplier Using DSP Blocks.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

SIMD-based Implementations of Eta Pairing Over Finite Fields of Small Characteristics.
Proceedings of the SECRYPT 2012, 2012

Core Based Architecture to Speed Up Optimal Ate Pairing on FPGA Platform.
Proceedings of the Pairing-Based Cryptography - Pairing 2012, 2012

Autonomous Certification with List-Based Revocation for Secure V2V Communication.
Proceedings of the Information Systems Security, 8th International Conference, 2012

Use of SIMD Features to Speed up Eta Pairing.
Proceedings of the E-Business and Telecommunications - International Joint Conference, 2012

Batch Verification of ECDSA Signatures.
Proceedings of the Progress in Cryptology - AFRICACRYPT 2012, 2012

Countermeasures of Side Channel Attacks on Symmetric Key Ciphers Using Cellular Automata.
Proceedings of the Cellular Automata, 2012

CASTREAM: A New Stream Cipher Suitable for Both Hardware and Software.
Proceedings of the Cellular Automata, 2012

CSHR: Selection of Cryptographically Suitable Hybrid Cellular Automata Rule.
Proceedings of the Cellular Automata, 2012

2011
Petrel: Power and Timing Attack Resistant Elliptic Curve Scalar Multiplier Based on Programmable GF(p) Arithmetic Unit.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A Parallel Efficient Architecture for Large Cryptographically Robust n × k (k>n/2) Mappings.
IEEE Trans. Computers, 2011

Cryptographically Suitable Maximum Length Cellular Automata.
J. Cell. Autom., 2011

Fault Attack, Countermeasures on Pairing Based Cryptography.
Int. J. Netw. Secur., 2011

Security of Prime Field Pairing Cryptoprocessor Against Differential Power Attack.
IACR Cryptol. ePrint Arch., 2011

Fast Selective Encryption Scheme for MP3 Files - Using GRAIN Stream Cipher.
Proceedings of the SECRYPT 2011 - Proceedings of the International Conference on Security and Cryptography, Seville, Spain, 18, 2011

Security of Prime Field Pairing Cryptoprocessor against Differential Power Attack.
Proceedings of the Security Aspects in Information Technology, 2011

PKDPA: An Enhanced Probabilistic Differential Power Attack Methodology.
Proceedings of the Progress in Cryptology - INDOCRYPT 2011, 2011

High Speed Cryptoprocessor for η T Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two Fields.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011

NOCAS : A Nonlinear Cellular Automata Based Stream Cipher.
Proceedings of the 17th International Workshop on Cellular Automata and Discrete Complex Systems, 2011

Fault Analysis of Grain-128 by Targeting NFSR.
Proceedings of the Progress in Cryptology - AFRICACRYPT 2011, 2011

2010
New Architectural Design of CA-Based Codec.
IEEE Trans. Very Large Scale Integr. Syst., 2010

High Speed Flexible Pairing Cryptoprocessor on FPGA Platform.
Proceedings of the Pairing-Based Cryptography - Pairing 2010, 2010

High speed Fp multipliers and adders on FPGA platform.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

An Efficient, Parameterized and Scalable S-box for Stream Ciphers.
Proceedings of the Information Security and Cryptology - 6th International Conference, 2010

<i>d</i>-Monomial Tests of Nonlinear Cellular Automata for Cryptographic Design.
Proceedings of the Cellular Automata, 2010

Generating Cryptographically Suitable Non-linear Maximum Length Cellular Automata.
Proceedings of the Cellular Automata, 2010

Null Boundary 90/150 Cellular Automata for Multi-byte Error Correcting Code.
Proceedings of the Cellular Automata, 2010

2009
An Integrated ECC-MAC Based on RS Code.
Trans. Comput. Sci., 2009

Effect of glitches against masked AES S-box implementation and countermeasure.
IET Inf. Secur., 2009

A Diagonal Fault Attack on the Advanced Encryption Standard.
IACR Cryptol. ePrint Arch., 2009

A Secure and Efficient Protocol for Group Key agreement in Heterogeneous Environment
CoRR, 2009

Parallel crypto-devices for GF(p) elliptic curve multiplication resistant against side channel attacks.
Comput. Electr. Eng., 2009

A New Image Encryption Algorithm using Cellular Automata.
Proceedings of the SECRYPT 2009, 2009

An Efficient Group Key Agreement Protocol for Heterogeneous Environment.
Proceedings of the SECRYPT 2009, 2009

Nmix: An Ideal Candidate for Key Mixing.
Proceedings of the SECRYPT 2009, 2009

An Efficient Protocol for Authenticated Group Key Agreement in Heterogeneous Networks.
Proceedings of the e-Business and Telecommunications - 6th International Joint Conference, 2009

A hierarchical approach towards system level static timing verification of SoCs.
Proceedings of the 27th International Conference on Computer Design, 2009

A Novel Seed Selection Algorithm for Test Time Reduction in BIST.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008
VLSI Architecture of a Cellular Automata based One-Way Function.
J. Comput., 2008

An Analytical Framework for Characterizing Restricted Two Dimensional Cellular Automata Evolution.
J. Cell. Autom., 2008

Customizing Cellular Message Encryption Algorithm.
Int. J. Netw. Secur., 2008

Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Raising the Level of Abstraction for the Timing Verification of System-on-Chips.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

Architectural Design of CA-Based Double Byte Error Correcting Codec.
Proceedings of the IEEE Reglon 10 Colloquium and Third International Conference on Industrial and Information Systems, 2008

A GF(p) elliptic curve group operator resistant against side channel attacks.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

A secure verifiable key agreement protocol for mobile conferencing.
Proceedings of the Third International Conference on COMmunication System softWAre and MiddlewaRE (COMSWARE 2008), 2008

Theory of Composing Non-linear Machines with Predictable Cyclic Structures.
Proceedings of the Cellular Automata, 2008

An Efficient n×nBoolean Mapping Using Additive Cellular Automata.
Proceedings of the Cellular Automata, 2008

coreBIST: A Cellular Automata Based Core for Self Testing System-on-Chips.
Proceedings of the Cellular Automata, 2008

An Improved Double Byte Error Correcting Code Using Cellular Automata.
Proceedings of the Cellular Automata, 2008

2007
Secured Flipped Scan-Chain Model for Crypto-Architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Hierarchical Verification of Galois Field Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

An Efficient Scan Tree Design for Compact Test Pattern Set.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Theory of a Class of Complemented Group Cellular Automata and Its Application to Cryptography.
J. Cell. Autom., 2007

An Efficient Design of Cellular Automata Based Cryptographically Robust One-Way Function.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Design of a Differential Power Analysis Resistant Masked AES S-Box.
Proceedings of the Progress in Cryptology, 2007

A Near Optimal S-Box Design.
Proceedings of the Information Systems Security, Third International Conference, 2007

A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

An area optimized reconfigurable encryptor for AES-Rijndael.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Strengthening NLS Against Crossword Puzzle Attack.
Proceedings of the Information Security and Privacy, 12th Australasian Conference, 2007

2006
An integrated DFT solution for mixed-signal SOCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Design of Key Establishment Protocol Using One-Way Functions to Avert <i>insider-replay</i> Attack.
Proceedings of the Information Systems Security, Second International Conference, 2006

Built-In Self-Test for Flash Memory Embedded in SoC.
Proceedings of the Third IEEE International Workshop on Electronic Design, 2006

A Programmable Parallel Structure to perform Galois Field Exponentiation.
Proceedings of the 9th International Conference in Information Technology, 2006

Generation of Expander Graphs Using Cellular Automata and Its Applications to Cryptography.
Proceedings of the Cellular Automata, 2006

A Cellular Automata Based Approach for Generation of Large Primitive Polynomial and Its Application to RS-Coded MPSK Modulation.
Proceedings of the Cellular Automata, 2006

2005
Key Mixing in Block Ciphers through Addition modulo 2<sup>n</sup>.
IACR Cryptol. ePrint Arch., 2005

Design and Analysis of a Robust and Efficient Block Cipher using Cellular Automata.
IACR Cryptol. ePrint Arch., 2005

An Efficient End to End Design of Rijndael Cryptosystem in 0.18 ? CMOS.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Computer Aided Test (CAT) Tool for Mixed Signal SOCs.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

A programmable built-in self-test for embedded DRAMs.
Proceedings of the 13th IEEE International Workshop on Memory Technology, 2005

CCMEA: Customized Cellular Message Encryption Algorithm for Wireless Networks.
Proceedings of the Information Systems Security, First International Conference, 2005

Modifications of SHA-0 to Prevent Attacks.
Proceedings of the Information Systems Security, First International Conference, 2005

Cellular automata based key agreement.
Proceedings of the ICETE 2005, 2005

CryptoScan: A Secured Scan Chain Architecture.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2004
Human protein reference database as a discovery resource for proteomics.
Nucleic Acids Res., 2004

Cellular Automata : An Ideal Candidate for a Block Cipher.
Proceedings of the Distributed Computing and Internet Technology, 2004

Characterization of a Class of Complemented Group Cellular Automata.
Proceedings of the Cellular Automata, 2004

2003
Cryptosystem Designed for Embedded System Security.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

A new design-for-test technique for reducing SOC test time.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Theory of Extended Linear Machines.
IEEE Trans. Computers, 2002

An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch.
J. Electron. Test., 2002

Reformatting Test Patterns for Testing Embedded Core Based System Using Test Access Mechanism (TAM) Switch.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Cellular Automata Based Cryptosystem (CAC).
Proceedings of the Information and Communications Security, 4th International Conference, 2002

2001
A Novel Strategy to Test Core Based Designs.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

2000
GF(2p) CA Based Vector Quantization for Fast Encoding of Still Images.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Scalable Pipelined Micro-Architecture for Wavelet Transform.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Application of GF(2p) CA in Burst Error Correcting Codes.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Theory and Applications of Cellular Automata for VLSI Design and Testing.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

1999
A VLSI Architecture for On-Line Image Decompression Using GF(28) Cellular Automata.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Cellular Automata Based Transform Coding for Image Compression.
Proceedings of the High Performance Computing, 1999

1998
Cellular-Automata-Array-Based Diagnosis of Board Level Faults.
IEEE Trans. Computers, 1998

1996
Theory and Application of Nongroup Cellular Automata for Synthesis of Easily Testable Finite State Machines.
IEEE Trans. Computers, 1996

An efficient encoding algorithm for image compression hardware based on cellular automata.
Proceedings of the 3rd International Conference on High Performance Computing, 1996

1995
CA-Based Byte Error-Correcting Code.
IEEE Trans. Computers, 1995

A Low-Cost High-Capacity Associative Memory Design Using Cellular Automata.
IEEE Trans. Computers, 1995

Board level fault diagnosis using cellular automata array.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

1994
Design of CAECC-Cellular Automata Based Error Correcting Code.
IEEE Trans. Computers, 1994

A class of two-dimensional cellular automata and their applications in random pattern testing.
J. Electron. Test., 1994

Architecture for VLSI Design of CA Based Byte Error Correcting Code Decoders.
Proceedings of the Seventh International Conference on VLSI Design, 1994

1993
Characterization of two-dimensional cellular automata using matrix algebra.
Inf. Sci., 1993

Synthesis of Self-Checking Sequential Machines Using Cellular Automata.
Proceedings of the Sixth International Conference on VLSI Design, 1993

Cellular automata based synthesis of easily and fully testable FSMs.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992
A Novel Scheme for Designing Error Correcting Codes Using Cellular Automata.
Proceedings of the Fifth International Conference on VLSI Design, 1992


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