Ihsan Çiçek

Orcid: 0000-0002-7881-1263

According to our database1, Ihsan Çiçek authored at least 14 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
A new read-write collision-based SRAM PUF implemented on Xilinx FPGAs.
J. Cryptogr. Eng., April, 2023

Live Demo: ShortCircuit: An Open-Source ChatGPT Driven Digital Integrated Circuit Front-End Design Automation Tool.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

ShortCircuit: An Open-Source ChatGPT Driven Digital Integrated Circuit Front-End Design Automation Tool.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
Performance Evaluation of Lightweight Cryptographic Algorithms on RISC-V.
Proceedings of the 30th Signal Processing and Communications Applications Conference, 2022

Performance Evaluation of Low-Precision Quantized LeNet and ConvNet Neural Networks.
Proceedings of the International Conference on INnovations in Intelligent SysTems and Applications, 2022

2021
Field-programmable gate array (FPGA) hardware design and implementation of a new area efficient elliptic curve crypto-processor.
Turkish J. Electr. Eng. Comput. Sci., 2021

2017
An Integrated Dual Entropy Core True Random Number Generator.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

2016
Continuous-Time Computational Aspects of Cyber-Physical Security.
Proceedings of the 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2016

2014
A novel design method for discrete time chaos based true random number generators.
Integr., 2014

2013
Random number generation using field programmable analog array implementation of logistic map.
Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013

Field programmable analog array implementation of logistic map.
Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013

A chaos based integrated jitter booster circuit for true random number generators.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012
A feasibility study of a 1D chaotic map for True Random Number Generation.
Proceedings of the 20th Signal Processing and Communications Applications Conference, 2012

2011
A hardware efficient chaotic ring oscillator based true random number generator.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011


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