Ismo Hänninen

According to our database, Ismo Hänninen authored at least 16 papers between 2007 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A Mini-MIPS microprocessor for adiabatic computing.

César O. Campos-Aguillón, Rene Celis-Cordova, Ismo K. Hänninen, Craig S. Lent, Alexei O. Orlov, Gregory L. Snider

Proceedings of the IEEE International Conference on Rebooting Computing, 2016

2015

Design and Fabrication of a Microprocessor Using Adiabatic CMOS and Bennett Clocking.

Ismo K. Hänninen, César O. Campos-Aguillón, Rene Celis-Cordova, Gregory L. Snider

Proceedings of the Reversible Computation - 7th International Conference, 2015

2014

Reversible and Adiabatic Computing: Energy-Efficiency Maximized.

Ismo Hänninen, Hao Lu, Enrique P. Blair, Craig S. Lent, Gregory L. Snider

Proceedings of the Field-Coupled Nanocomputing - Paradigms, Progress, and Perspectives, 2014

Adiabatic CMOS: Limits of Reversible Energy Recovery and First Steps for Design Automation.

Ismo Hänninen, Gregory L. Snider, Craig S. Lent

Trans. Comput. Sci., 2014

Quantifying Irreversible Information Loss in Digital Circuits.

Ismo Hänninen, Craig S. Lent, Gregory L. Snider

ACM J. Emerg. Technol. Comput. Syst., 2014

2013

Energy Recovery and Logical Reversibility in Adiabatic CMOS Multiplier.

Ismo Hänninen, Hao Lu, Craig S. Lent, Gregory L. Snider

Proceedings of the Reversible Computation - 5th International Conference, 2013

Models of irreversibility for binary adders.

Ismo Hänninen, Craig S. Lent, Gregory L. Snider

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012

Irreversibility induced density limits and logical reversiblity in nanocircuits.

Ismo Hänninen, Jarmo Takala

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Network on metachip architectures.

Ismo Hänninen, Wayne Buckhanan, Michael T. Niemier, Gary H. Bernstein

Proceedings of the Fifth International Workshop on Network on Chip Architectures, 2012

2011

Irreversible bit erasures in binary multipliers.

Ismo Hänninen, Jarmo Takala, Craig S. Lent

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Binary Adders on Quantum-Dot Cellular Automata.

Ismo Hänninen, Jarmo Takala

J. Signal Process. Syst., 2010

2009

Radix-4 Recoded Multiplier on Quantum-Dot Cellular Automata.

Ismo Hänninen, Jarmo Takala

Proceedings of the Embedded Computer Systems: Architectures, 2009

2008

Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology.

Ismo Hänninen, Jarmo Takala

Proceedings of the Embedded Computer Systems: Architectures, 2008

Reliability of n-Bit Nanotechnology Adder.

Ismo Hänninen, Jarmo Takala

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2007

Pipelined array multiplier based on quantum-dot cellular automata.

Ismo Hänninen, Jarmo Takala

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Robust Adders Based on Quantum-Dot Cellular Automata.

Ismo Hänninen, Jarmo Takala

Proceedings of the IEEE International Conference on Application-Specific Systems, 2007