Jaeyong Lee
Orcid: 0000-0002-0073-2733Affiliations:
- Soongsil University, Department of Electronic Engineering, Seoul, Korea
According to our database1,
Jaeyong Lee authored at least 10 papers
between 2023 and 2026.
Collaborative distances:
Collaborative distances:
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Bibliography
2026
Hybrid-Oxide Two-Stacked-FET CMOS Power Amplifier With Optimized Gate Impedance for X-Band Applications.
IEEE Access, 2026
IEEE Access, 2026
Design Methodology of an Inductorless GaAs pHEMT SPDT Switch With Compact Size for Sub-6 GHz Applications.
IEEE Access, 2026
2025
Design of Compact Size CMOS VCO Using Dual-Primary Transformer With Dual-Core for Wide Tuning-Range.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2025
2.4-GHz CMOS Power Amplifier With Common-Mode Self-Rejection Technique to Suppress Even Harmonics.
IEEE Access, 2025
A High-Power SPDT Switch With Resonant Isolation Based on GaAs BiFET Technology for Sub-6-GHz Front-End Modules.
IEEE Access, 2025
K-Band 65-nm CMOS 2-Stage LNA Using High-Pass Filter for Low-Noise and Neutralization Capacitor for Wideband Performance.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025
2024
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024
2023
IEEE Access, 2023