Jami Wiedemer
Orcid: 0000-0001-6874-0636
According to our database1,
Jami Wiedemer
authored at least 3 papers
between 2018 and 2020.
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Bibliography
2020
A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power Overhead.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
2019
A 23.6-Mb/mm $^{2}$ SRAM in 10-nm FinFET Technology With Pulsed-pMOS TVC and Stepped-WL for Low-Voltage Applications.
IEEE J. Solid State Circuits, 2019
2018
A 23.6Mb/mm<sup>2</sup> SRAM in 10nm FinFET technology with pulsed PMOS TVC and stepped-WL for low-voltage applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018