Jan Schmidt

According to our database1, Jan Schmidt authored at least 43 papers between 1991 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Reducing Output Response Aliasing Using Boolean Optimization Techniques.
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

2022
Interval Constraint Satisfaction: Towards Edge Acceleration.
Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022

2021
Influence of Augmented Reality on Consumer Behaviour in Online Retailing.
Proceedings of the Business Information Systems Workshops, 2021

2020
Standard Cell Tuning Enables Data-Independent Static Power Consumption.
Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

2019
SAT-Based Generation of Optimum Circuits with Polymorphic Behavior Support.
J. Circuits Syst. Comput., 2019

Weighted Load Balancing in Distributed Hash Tables.
Proceedings of the 21st International Conference on Information Integration and Web-based Applications & Services, 2019

I4.0-compliant integration of assets utilizing the Asset Administration Shell.
Proceedings of the 24th IEEE International Conference on Emerging Technologies and Factory Automation, 2019


CMOS Illumination Discloses Processed Data.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

Analyzing and Optimizing the Dummy Rounds Scheme.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

Using Voters May Lead to Secret Leakage.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

2018
Towards AND/XOR balanced synthesis: Logic circuits rewriting with XOR.
Microelectron. Reliab., 2018

ZATPG: SAT-based test patterns generator with zero-aliasing in temporal compaction.
Microprocess. Microsystems, 2018

Dummy Rounds as a DPA Countermeasure in Hardware.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017
Conceptional Problems of Transaction-based Modeling and its Implementation in SimEvents 4.4.
Simul. Notes Eur., 2017

Error masking method based on the short-duration offline test.
Microprocess. Microsystems, 2017

Emulator of contactless smart cards in FPGA.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

SAT-Based ATPG for Zero-Aliasing Compaction.
Proceedings of the Euromicro Conference on Digital System Design, 2017

SAT-Based Generation of Optimum Function Implementations with XOR Gates.
Proceedings of the Euromicro Conference on Digital System Design, 2017

Eine vollautomatisierte e-Leaming Plattform am Beispiel eines Universitätspraktikums.
Proceedings of the 10. DFN-Forum, 2017

Are XORs in logic synthesis really necessary?
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016
Error Correction Method Based on the Short-Duration Offline Test.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
Novel C-Element Based Error Detection and Correction Method Combining Time and Area Redundancy.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
On don't cares in test compression.
Microprocess. Microsystems, 2014

On Robustness of EDA Tools.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

PBO-Based Test Compression.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Sources of bias in EDA tools and its influence.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013
The influence of implementation type on dependability parameters.
Microprocess. Microsystems, 2013

Techniques for SAT-based constrained test pattern generation.
Microprocess. Microsystems, 2013

Simulation and SAT Based ATPG for Compressed Test Generation.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
The Influence of Implementation Technology on Dependability Parameters.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Improving the iterative power of resynthesis.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2010
Test Patterns Compression Technique Based on a Dedicated SAT-Based ATPG.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

On logic synthesis of conventionally hard to synthesize circuits using genetic programming.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009
Das Social Semantic Web aus kommunikationssoziologischer Perspektive.
Proceedings of the Social Semantic Web: Web 2.0 - Was nun?, 2009

The Case for a Balanced Decomposition Process.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2007
General Digit-Serial Normal Basis Multiplier with Distributed Overlap.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2006
General Digit Width Normal Basis Multipliers with Circular and Linear Structure.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Two Architectures of a General Digit-Serial Normal Basis Multiplier.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Normal Basis Multipliers of General Digit Width Applicable in Elliptic Curve Cryptography.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2003
Normal basis multiplication and inversion unit for elliptic curve cryptography.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2002
Exploration of Design Space in ECDSA.
Proceedings of the Field-Programmable Logic and Applications, 2002

1991
Strategy of one and half layer routing.
Microprocessing and Microprogramming, 1991


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