Zdenek Vasícek

Orcid: 0000-0002-2279-5217

According to our database1, Zdenek Vasícek authored at least 96 papers between 2006 and 2023.

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Bibliography

2023
Acceleration Techniques for Automated Design of Approximate Convolutional Neural Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

autoXFPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems.
CoRR, 2023

Xel-FPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Towards a General Boolean Function Benchmark Suite.
Proceedings of the Companion Proceedings of the Conference on Genetic and Evolutionary Computation, 2023

General Boolean Function Benchmark Suite.
Proceedings of the 17th ACM/SIGEVO Conference on Foundations of Genetic Algorithms, 2023

2022
SagTree: Towards efficient mutation in evolutionary circuit approximation.
Swarm Evol. Comput., 2022

Delay-aware evolutionary optimization of digital circuits.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Graph-based genetic programming.
Proceedings of the GECCO '22: Genetic and Evolutionary Computation Conference, Companion Volume, Boston, Massachusetts, USA, July 9, 2022

2021
Semantically-oriented mutation operator in cartesian genetic programming for evolutionary circuit design.
Genet. Program. Evolvable Mach., 2021

Resynthesis of logic circuits using machine learning and reconvergent paths.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Synthesis of approximate circuits for LUT-based FPGAs.
Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

2020
Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers.
IEEE Trans. Very Large Scale Integr. Syst., 2020

EA-based resynthesis: an efficient tool for optimization of digital circuits.
Genet. Program. Evolvable Mach., 2020

Libraries of Approximate Circuits: Automated Design and Application in CNN Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020

Adaptive verifiability-driven strategy for evolutionary approximation of arithmetic circuits.
Appl. Soft Comput., 2020

Design, Verification, Test and In-Field Implications of Approximate Computing Systems.
Proceedings of the IEEE European Test Symposium, 2020

TFApprox: Towards a Fast Emulation of DNN Approximate Hardware Accelerators on GPU.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

ApproxFPGAs: Embracing ASIC-Based Approximate Arithmetic Components for FPGA-Based Systems.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019
Formal Methods for Exact Analysis of Approximate Circuits.
IEEE Access, 2019

EA-Based Refactoring of Mapped Logic Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining.
Proceedings of the International Conference on Computer-Aided Design, 2019

Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019

Towards a Scalable EA-Based Optimization of Digital Circuits.
Proceedings of the Genetic Programming - 22nd European Conference, 2019

Automated Circuit Approximation Method Driven by Data Distribution.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Automated Search-Based Functional Approximation for Digital Circuits.
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019

2018
Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Role of circuit representation in evolutionary design of energy-efficient approximate circuits.
IET Comput. Digit. Tech., 2018

Special session: How approximate computing impacts verification, test and reliability.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Design Space Exploration for Approximate Implementations of Arithmetic Data Path Primitives.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Evolutionary design of large approximate adders optimized for various error criteria.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2018

Evolving boolean functions for fast and efficient randomness testing.
Proceedings of the Genetic and Evolutionary Computation Conference, 2018

ADAC: Automated Design of Approximate Circuits.
Proceedings of the Computer Aided Verification - 30th International Conference, 2018

Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic Environment.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018

2017
Trading between quality and non-functional properties of median filter in embedded systems.
Genet. Program. Evolvable Mach., 2017

Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Parallel optimization of transistor level circuits using cartesian genetic programming.
Proceedings of the Genetic and Evolutionary Computation Conference, 2017

Towards low power approximate DCT architecture for HEVC standard.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Evolutionary design of complex approximate combinational circuits.
Genet. Program. Evolvable Mach., 2016

Evolutionary functional approximation of circuits implemented into FPGAs.
Proceedings of the 2016 IEEE Symposium Series on Computational Intelligence, 2016

Automatic design of arbitrary-size approximate sorting networks with error guarantee.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Design of power-efficient approximate multipliers for approximate artificial neural networks.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Search-based synthesis of approximate circuits implemented into FPGAs.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Automatic design of approximate circuits by means of multi-objective evolutionary algorithms.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015
Functional Equivalence Checking for Evolution of Complex Digital Circuits.
Proceedings of the Evolvable Hardware - From Practice to Application, 2015

Evolutionary Approach to Approximate Digital Circuits Design.
IEEE Trans. Evol. Comput., 2015

Evolutionary Approximation of Complex Digital Circuits.
Proceedings of the Genetic and Evolutionary Computation Conference, 2015

Evolutionary Approximation of Software for Embedded Systems: Median Function.
Proceedings of the Genetic and Evolutionary Computation Conference, 2015

Circuit Approximation Using Single- and Multi-objective Cartesian GP.
Proceedings of the Genetic Programming - 18th European Conference, 2015

Cartesian GP in Optimization of Combinational Circuits with Hundreds of Inputs and Thousands of Gates.
Proceedings of the Genetic Programming - 18th European Conference, 2015

Evolutionary Design of Transistor Level Digital Circuits Using Discrete Simulation.
Proceedings of the Genetic Programming - 18th European Conference, 2015

Automatic Design of Low-Power VLSI Circuits: Accurate and Approximate Multipliers.
Proceedings of the 13th IEEE International Conference on Embedded and Ubiquitous Computing, 2015

2014
How to evolve complex combinational circuits from scratch?
Proceedings of the 2014 IEEE International Conference on Evolvable Systems, 2014

Acceleration of transistor-level evolution using Xilinx Zynq Platform.
Proceedings of the 2014 IEEE International Conference on Evolvable Systems, 2014

On Evolution of Multi-category Pattern Classifiers Suitable for Embedded Systems.
Proceedings of the Genetic Programming - 17th European Conference, 2014

Evolutionary design of approximate multipliers under different error metrics.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

Cartesian genetic programming as local optimizer of logic networks.
Proceedings of the IEEE Congress on Evolutionary Computation, 2014

On Evolutionary Approximation of Logic Circuits.
Proceedings of the Computing with New Resources, 2014

2013
Evolution of efficient real-time non-linear image filters for FPGAs.
Soft Comput., 2013

Implementing A Unique Chip Id On A Reconfigurable Polymorphic Circuit.
Inf. Technol. Control., 2013

Approximate circuit design by means of evolvable hardware.
Proceedings of the 2013 IEEE International Conference on Evolvable Systems, 2013

Functional-level development of image filters by means of cellular automata.
Proceedings of the 2013 IEEE International Conference on Evolvable Systems, 2013

Evolution of cellular automata with conditionally matching rules.
Proceedings of the IEEE Congress on Evolutionary Computation, 2013

2012
Acceleration Methods for Evolutionary Design of Digital Circuits.
PhD thesis, 2012

Efficient Phenotype Evaluation in Cartesian Genetic Programming.
Proceedings of the Genetic Programming - 15th European Conference, 2012

A SAT-based fitness function for evolutionary optimization of polymorphic circuits.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

On area minimization of complex combinational circuits using cartesian genetic programming.
Proceedings of the IEEE Congress on Evolutionary Computation, 2012

Two-step evolution of polymorphic circuits for image multi-filtering.
Proceedings of the IEEE Congress on Evolutionary Computation, 2012

Evolution of cellular automata using instruction-based approach.
Proceedings of the IEEE Congress on Evolutionary Computation, 2012

Cellular Automaton as Sorting Network Generator Using Instruction-Based Development.
Proceedings of the Cellular Automata, 2012

2011
CGP Acceleration Using Field-Programmable Gate Arrays.
Proceedings of the Cartesian Genetic Programming, 2011

Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware.
Genet. Program. Evolvable Mach., 2011

A global postsynthesis optimization method for combinational circuits.
Proceedings of the Design, Automation and Test in Europe, 2011

Evolutionary design of robust noise-specific image filters.
Proceedings of the IEEE Congress on Evolutionary Computation, 2011

Evolutionary design of efficient and robust switching image filters.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011

2010
Sorting Network Development Using Cellular Automata.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2010

On logic synthesis of conventionally hard to synthesize circuits using genetic programming.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

A method for design of impulse bursts noise filters optimized for FPGA implementations.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
REPOMO32 - New reconfigurable polymorphic integrated circuit for adaptive hardware.
Proceedings of the 2009 IEEE Workshop on Evolvable and Adaptive Hardware, 2009

Development of combinational circuits using non-uniform cellular automata: initial results.
Proceedings of the Genetic and Evolutionary Computation Conference, 2009

Investigating gate-level evolutionary development of combinational multipliers using enhanced cellular automata-based model.
Proceedings of the IEEE Congress on Evolutionary Computation, 2009

Evolution of Impulse Bursts Noise Filters.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

Comparison of the Uniform and Non-Uniform Cellular Automata-Based Approach to the Development of Combinational Circuits.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

2008
On Evolutionary Synthesis of Linear Transforms in FPGA.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2008

Cellular Automata-Based Development of Combinational and Polymorphic Circuits: A Comparative Study.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2008

Hardware Accelerators for Cartesian Genetic Programming.
Proceedings of the Genetic Programming, 11th European Conference, 2008

Novel Hardware Implementation of Adaptive Median Filters.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008

Gate-Level Evolutionary Development Using Cellular Automata.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008

2007
Reducing the Area on a Chip Using a Bank of Evolved Filters.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2007

An area-efficient alternative to adaptive median filtering in FPGAs.
Proceedings of the FPL 2007, 2007

Evaluation of a New Platform For Image Filter Evolution.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

2006
On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level.
Proceedings of the Applications of Evolutionary Computing, 2006


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