Janghaeng Lee

Orcid: 0009-0005-1915-6077

According to our database1, Janghaeng Lee authored at least 15 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Demonstration of Portable Performance of Scientific Machine Learning on High Performance Computing Systems.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

2019
Multi-objective Exploration for Practical Optimization Decisions in Binary Translation.
ACM Trans. Embed. Comput. Syst., 2019

2015
Virtualizing Data Parallel Systems for Portability, Productivity, and Performance.
PhD thesis, 2015

SKMD: Single Kernel on Multiple Devices for Transparent CPU-GPU Collaboration.
ACM Trans. Comput. Syst., 2015

Orchestrating Multiple Data-Parallel Kernels on Multiple Devices.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014
Scaling Performance via Self-Tuning Approximation for Graphics Engines.
ACM Trans. Comput. Syst., 2014

Leveraging GPUs using cooperative loop speculation.
ACM Trans. Archit. Code Optim., 2014

Paraprox: pattern-based approximation for data parallel applications.
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2014

VAST: the illusion of a large memory space for GPUs.
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013
SAGE: self-tuning approximation for graphics engines.
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

Transparent CPU-GPU collaboration for data-parallel kernels on heterogeneous systems.
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012
Adaptive input-aware compilation for graphics engines.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2012

Paragon: collaborative speculative loop execution on GPU and CPU.
Proceedings of the 5th Annual Workshop on General Purpose Processing with Graphics Processing Units, 2012

2010
Thread tailor: dynamically weaving threads together for efficient, adaptive parallel applications.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

2007
A high performance NIDS using FPGA-based regular expression matching.
Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), 2007


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