Neungsoo Park

According to our database1, Neungsoo Park authored at least 25 papers between 1996 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2020
High performance parallel KMP algorithm on a heterogeneous architecture.
Clust. Comput., 2020

2019
Gender Classification Based on the Non-Lexical Cues of Emergency Calls with Recurrent Neural Networks (RNN).
Symmetry, 2019

2018
Design Algorithm for Optimum Capacity of ESS Connected With PVs Under the RPS Program.
IEEE Access, 2018

High Performance Parallel KMP Algorithm on a Heterogeneous Architecture.
Proceedings of the 2018 IEEE 3rd International Workshops on Foundations and Applications of Self* Systems (FAS*W), 2018

2014
Router architecture evaluation for security network.
Peer-to-Peer Netw. Appl., 2014

2013
Sensor Protocol for Roaming Bluetooth Multiagent Systems.
Int. J. Distributed Sens. Networks, 2013

High throughput energy efficient parallel FFT architecture on FPGAs.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2013

2012
Evaluation of the Image Backtrack-Based Fast Direct Mode Decision Algorithm.
J. Inf. Process. Syst., 2012

2011
An Extended Cloud Computing Architecture for Immediate Sharing of Avionic Contents.
Proceedings of the Advanced Communication and Networking, 2011

2007
A high performance NIDS using FPGA-based regular expression matching.
Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), 2007

Quarter-pel Interpolation Architecture in H.264/AVC Decoder.
Proceedings of the 2007 International Conference on Intelligent Pervasive Computing, 2007

2006
Low Power Microprocessor Design for Embedded Systems.
Proceedings of the Computational Science and Its Applications, 2006

SONA: An On-Chip Network for Scalable Interconnection of AMBA-Based IPs.
Proceedings of the Computational Science, 2006

Performance Evaluation of a Chip-MultiThreading Server for High Performance Computing Applications.
Proceedings of the High Performance Computing, 2006

Register Array Structure for Effective Edge Filtering Operation of Deblocking Filter.
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2006

2005
A Hardware Implementation for Fingerprint Retrieval.
Proceedings of the Knowledge-Based Intelligent Information and Engineering Systems, 2005

2004
Dynamic data layouts for cache-conscious implementation of a class of signal transforms.
IEEE Trans. Signal Process., 2004

2003
Tiling, Block Data Layout, and Memory Hierarchy Performance.
IEEE Trans. Parallel Distributed Syst., 2003

2002
Analysis of Memory Hierarchy Performance of Block Data Layout.
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002

2001
Cache conscious Walsh-Hadamard transform.
Proceedings of the IEEE International Conference on Acoustics, 2001

2000
Dynamic Data Layouts for Cache-Conscious Factorization of DFT.
Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000

Performance of On-Chip Multiprocessors for Vision Tasks.
Proceedings of the Parallel and Distributed Processing, 2000

1999
Efficient Algorithms for Block-Cyclic Array Redistribution Between Processor Sets.
IEEE Trans. Parallel Distributed Syst., 1999

1997
Efficient Algorithms for Multi-dimensional Block-Cyclic Redistribution of Arrays.
Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997

1996
Synthesis of VLSI architectures for tree-structured image coding.
Proceedings of the Proceedings 1996 International Conference on Image Processing, 1996


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