Nathan Clark

According to our database1, Nathan Clark authored at least 26 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2023
SurfaceAug: Closing the Gap in Multimodal Ground Truth Sampling.
CoRR, 2023

L-Band Spectral Opportunities for Cognitive GEO-LEO Dual Satellite Networks.
Proceedings of the 22nd International Symposium on Communications and Information Technologies, 2023

2020
Design, Control, and Simulation of a Neonatal Incubator.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020

2019
Systematic discovery of the functional impact of somatic genome alterations in individual tumors through tumor-specific causal inference.
PLoS Comput. Biol., 2019

2013
Low cost solar thermal energy generation for developing economies.
Proceedings of the 2013 IEEE Global Humanitarian Technology Conference, 2013

2012
Implementation of interactive arm playback behaviors of social robot Zeno for autism spectrum disorder therapy.
Proceedings of the 5th International Conference on PErvasive Technologies Related to Assistive Environments, 2012

2011
Brainy: effective selection of data structures.
Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, 2011

2010
Thread tailor: dynamically weaving threads together for efficient, adaptive parallel applications.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

A case for custom silicon in enabling low-cost information technology for developing regions.
Proceedings of the First ACM Annual Symposium on Computing for Development, 2010

Mighty-morphing power-SIMD.
Proceedings of the 2010 International Conference on Compilers, 2010

Ocelot: a dynamic optimization framework for bulk-synchronous applications in heterogeneous systems.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009
DDT: design and evaluation of a dynamic program analysis for optimizing data structure usage.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Commutativity analysis for software parallelization: letting program transformations see the big picture.
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, 2009

2008
VEAL: Virtualized Execution Accelerator for Loops.
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

2007
Customizing the Computation Capabilities of Microprocessors.
PhD thesis, 2007

Liquid SIMD: Abstracting SIMD Hardware using Lightweight Dynamic Mapping.
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007

Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping.
Proceedings of the Fifth International Symposium on Code Generation and Optimization (CGO 2007), 2007

2006
Scalable subgraph mapping for acyclic computation accelerators.
Proceedings of the 2006 International Conference on Compilers, 2006

2005
Automated Custom Instruction Generation for Domain-Specific Processor Acceleration.
IEEE Trans. Computers, 2005

An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors.
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

Exploring the design space of LUT-based transparent accelerators.
Proceedings of the 2005 International Conference on Compilers, 2005

2004
Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization.
Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths.
Proceedings of the 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 2004

2003
Automatic Design of Application Specific Instruction Set Extensions Through Dataflow Graph Exploration.
Int. J. Parallel Program., 2003

Processor Acceleration Through Automated Instruction Set Customization.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

Systematic Register Bypass Customization for Application-Specific Processors.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003


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