Jangsaeng Kim

Orcid: 0000-0003-4519-135X

According to our database1, Jangsaeng Kim authored at least 10 papers between 2019 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2025
Multifunctional In-Memory Analog-to-Digital Converter for Next-Gen Compute-in-Memory Systems.
Adv. Intell. Syst., 2025

Analysis of Transient Response of Negative Capacitance Field-Effect Transistor.
IEEE Access, 2025

2024
Toward Optimized In-Memory Reinforcement Learning: Leveraging 1/<i>f</i> Noise of Synaptic Ferroelectric Field-Effect-Transistors for Efficient Exploration.
Adv. Intell. Syst., June, 2024

2022
On-Chip Trainable Spiking Neural Networks Using Time-To-First-Spike Encoding.
IEEE Access, 2022

2021
On-chip trainable hardware-based deep Q-networks approximating a backpropagation algorithm.
Neural Comput. Appl., 2021

Hardware-based spiking neural network architecture using simplified backpropagation algorithm and homeostasis functionality.
Neurocomputing, 2021

Direct Gradient Calculation: Simple and Variation-Tolerant On-Chip Training Method for Neural Networks.
Adv. Intell. Syst., 2021

Hardware-Based Spiking Neural Network Using a TFT-Type AND Flash Memory Array Architecture Based on Direct Feedback Alignment.
IEEE Access, 2021

2020
Hardware Implementation of Spiking Neural Networks Using Time-To-First-Spike Encoding.
CoRR, 2020

2019
Review of candidate devices for neuromorphic applications.
Proceedings of the 49th European Solid-State Device Research Conference, 2019


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