Sung Yun Woo
Orcid: 0000-0002-0857-3183
According to our database1,
Sung Yun Woo
authored at least 13 papers
between 2014 and 2024.
Collaborative distances:
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Bibliography
2024
Si-Based Dual-Gate Field-Effect Transistor Array for Low-Power On-Chip Trainable Hardware Neural Networks.
Adv. Intell. Syst., January, 2024
2022
Neuron Circuits for Low-Power Spiking Neural Networks Using Time-To-First-Spike Encoding.
IEEE Access, 2022
2021
On-chip trainable hardware-based deep Q-networks approximating a backpropagation algorithm.
Neural Comput. Appl., 2021
Hardware-based spiking neural network architecture using simplified backpropagation algorithm and homeostasis functionality.
Neurocomputing, 2021
CoRR, 2021
Spiking Neural Networks With Time-to-First-Spike Coding Using TFT-Type Synaptic Device Model.
IEEE Access, 2021
Hardware-Based Spiking Neural Network Using a TFT-Type AND Flash Memory Array Architecture Based on Direct Feedback Alignment.
IEEE Access, 2021
2020
Hardware Implementation of Spiking Neural Networks Using Time-To-First-Spike Encoding.
CoRR, 2020
Low-Power and High-Density Neuron Device for Simultaneous Processing of Excitatory and Inhibitory Signals in Neuromorphic Systems.
IEEE Access, 2020
Low-Power Binary Neuron Circuit With Adjustable Threshold for Binary Neural Networks Using NAND Flash Memory.
IEEE Access, 2020
2019
A Spiking Neural Network with a Global Self-Controller for Unsupervised Learning Based on Spike-Timing-Dependent Plasticity Using Flash Memory Synaptic Devices.
Proceedings of the International Joint Conference on Neural Networks, 2019
Proceedings of the 49th European Solid-State Device Research Conference, 2019
2014
IEICE Trans. Electron., 2014