Javier Barrera

Orcid: 0000-0003-1469-2514

According to our database1, Javier Barrera authored at least 5 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Assessing the Use of NVIDIA Multi-Instance GPU in the Automotive Domain.
IEEE Embed. Syst. Lett., February, 2026

2025
Hardware support for contention tracking in CPU and GPU last-level cache.
J. Syst. Archit., 2025

2024
Increasing Testing Robustness of GPU Software in Embedded Critical Systems.
Proceedings of the 39th ACM/SIGAPP Symposium on Applied Computing, 2024

2022
Contention Tracking in GPU Last-Level Cache.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

2020
On the reliability of hardware event monitors in MPSoCs for critical domains.
Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020


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