Jean-Baptiste Chaudron

Orcid: 0000-0002-2142-1336

According to our database1, Jean-Baptiste Chaudron authored at least 10 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2023
Exploring iGPU Memory Interference Response to L2 Cache Locking.
Proceedings of the 21th International Workshop on Worst-Case Execution Time Analysis, 2023

Exploring Segnet Architectures for iGPU Embedded Devices.
Proceedings of the 15th International Joint Conference on Computational Intelligence, 2023

Identification of Writing Preferences in Wikipedia.
Proceedings of the Complex Networks & Their Applications XII, 2023

2022
Task and Memory Mapping Optimization for SDRAM Interference Minimization on Heterogeneous MPSoCs.
Proceedings of the 27th IEEE International Conference on Emerging Technologies and Factory Automation, 2022

Towards an efficient cost function equation for DDR SDRAM interference analysis on heterogeneous MPSoCs.
Proceedings of the 26th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2022

2021
Running Large-Scale and Hybrid Real-Time Aircraft Simulations in an HLA Framework.
Proceedings of the Software Engineering and Formal Methods. SEFM 2021 Collocated Workshops, 2021

Heterogeneous multicore SDRAM interference analysis.
Proceedings of the RTNS'2021: 29th International Conference on Real-Time Networks and Systems, 2021

Recurrent Neural Networks Analysis for Embedded Systems.
Proceedings of the 13th International Joint Conference on Computational Intelligence, 2021

2014
Real-time distributed simulations in an HLA framework: Application to aircraft simulation.
Simul., 2014

2012
Real-Time Distributed Aircraft Simulation through HLA.
Proceedings of the 16th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2012


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