Ji-Hyoung Cha
Orcid: 0000-0001-8126-067X
According to our database1,
Ji-Hyoung Cha
authored at least 7 papers
between 2018 and 2022.
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Bibliography
2022
A CMOS Microelectrode Array System With Reconfigurable Sub-Array Multiplexing Architecture Integrating 24,320 Electrodes and 380 Readout Channels.
IEEE Trans. Biomed. Circuits Syst., December, 2022
A 3.8-µW 1.5-NEF 15-GΩ Total Input Impedance Chopper Stabilized Amplifier With Auto-Calibrated Dual Positive Feedback in 110-nm CMOS.
IEEE J. Solid State Circuits, 2022
A Reconfigurable Sub-Array Multiplexing Microelectrode Array System With 24, 320 Electrodes and 380 Readout Channels for Investigating Neural Communication.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
A 3.8-μW/Ch, 15-GΩ Total Input Impedance Chopper Stabilized Amplifier with Dual Positive Feedback Loops and Auto-calibration Scheme.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2019
A Sub-µW/Ch Analog Front-End for Δ-Neural Recording With Spike-Driven Data Compression.
IEEE Trans. Biomed. Circuits Syst., 2019
A Multimodal Multichannel Neural Activity Readout IC with 0.7μW/Channel Ca<sup>2+</sup>-Probe-Based Fluorescence Recording and Electrical Recording.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2018
Proceedings of the International SoC Design Conference, 2018