Doojin Jang
According to our database1,
Doojin Jang
authored at least 8 papers
between 2017 and 2021.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2021
A 96.6%-Efficiency Continuous-Input-Current Hybrid Dual-Path Buck-Boost Converter with Single-Mode Operation and Non-Stopping Output Current Delivery.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
An On-Chip Dual-Output Switched-Capacitor DC- DC Converter with Fine-Grained Output Control.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
A 0.0046mm<sup>2</sup> 6.7μW Three-Stage Amplifier Capable of Driving 0.5-to-1.9nF Capacitive Load with >0.68MHz GBW without Compensation Zero.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Input-Adaptive and Regulated Multi-Output Power Management Unit for Wireless Power Reception and Distribution in Multi-Unit Implantable Devices.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020
2019
A Multimodal Multichannel Neural Activity Readout IC with 0.7μW/Channel Ca<sup>2+</sup>-Probe-Based Fluorescence Recording and Electrical Recording.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A Level Shifter for CMRR-Enhanced Biopotential Acquisition Systems with Human-Body-Coupled Floating Supply Domain.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
2018
A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018
2017
A neural recording amplifier based on adaptive SNR optimization technique for long-term implantation.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017