Jia-Wen Chang

According to our database¹, Jia-Wen Chang authored at least 7 papers between 2011 and 2014.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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PhD thesis

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Bibliography

2014

Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

2013

An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2012

Integrated fluidic-chip co-design methodology for digital microfluidic biochips.

[BibT_eX]

[DOI]

Tsung-Wei Huang

Jia-Wen Chang

Tsung-Yi Ho

Proceedings of the International Symposium on Physical Design, 2012

Voltage-aware chip-level design for reliability-driven pin-constrained EWOD chips.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

An ILP-based obstacle-avoiding routing algorithm for pin-constrained EWOD chips.

[BibT_eX]

[DOI]

Jia-Wen Chang

Tsung-Wei Huang

Tsung-Yi Ho

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Recent research and emerging challenges in design and optimization for digital microfluidic biochips.

[BibT_eX]

[DOI]

Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

Jia-Wen Chang

Timeline

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Links

On csauthors.net:

Bibliography

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