Tsung-Wei Huang
Orcid: 0000-0001-9768-3378
According to our database1,
Tsung-Wei Huang
authored at least 102 papers
between 2009 and 2024.
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Bibliography
2024
Anytime Multi-Agent Path Finding using Operation Parallelism in Large Neighborhood Search.
CoRR, 2024
Proceedings of the 2024 International Symposium on Physical Design, 2024
Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2024
2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
IEEE Access, 2023
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023
SNICIT: Accelerating Sparse Neural Network Inference via Compression at Inference Time on GPU.
Proceedings of the 52nd International Conference on Parallel Processing, 2023
Proceedings of the IEEE International Conference on Image Processing, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Invited Paper: Programming Dynamic Task Parallelism for Heterogeneous EDA Algorithms.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
GLARE: Accelerating Sparse DNN Inference Kernels with Global Memory Access Reduction.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023
2022
IEEE Trans. Parallel Distributed Syst., 2022
IEEE Trans. Parallel Distributed Syst., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++.
CoRR, 2022
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
Proceedings of the 51st International Conference on Parallel Processing, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022
Proceedings of the HPDC '22: The 31st International Symposium on High-Performance Parallel and Distributed Computing, Minneapolis, MN, USA, 27 June 2022, 2022
Efficient timing propagation with simultaneous structural and pipeline parallelisms: late breaking results.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021
Proceedings of the IEEE/ACM International Workshop on Programming and Performance Visualization Tools, 2021
Proceedings of the 2021 IEEE International Conference on Image Processing, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
HeteroCPPR: Accelerating Common Path Pessimism Removal with Heterogeneous CPU-GPU Parallelism.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021
Proceedings of the Euro-Par 2021: Parallel Processing, 2021
An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads.
Proceedings of the Euro-Par 2021: Parallel Processing Workshops, 2021
Proceedings of the 6th IEEE/ACM International Workshop on Extreme Scale Programming Models and Middleware, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
Mermin's inequalities of multiple qubits with orthogonal measurements on IBM Q 53-qubit system.
Quantum Eng., 2020
Cpp-Taskflow v2: A General-purpose Parallel and Heterogeneous Task Programming System at Scale.
CoRR, 2020
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020
Proceedings of the 26th IEEE International Conference on Parallel and Distributed Systems, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
A Novel Inference Algorithm for Large Sparse Neural Network using Task Graph Parallelism.
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020
An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Fish Tracking and Segmentation From Stereo Videos on the Wild Sea Surface for Electronic Monitoring of Rail Fishing.
IEEE Trans. Circuits Syst. Video Technol., 2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Proceedings of the 27th ACM International Conference on Multimedia, 2019
Proceedings of the 2019 IEEE International Parallel and Distributed Processing Symposium, 2019
Recognizing Fish Species Captured Live on Wild Sea Surface in Videos by Deep Metric Learning with a Temporal Constraint.
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019
Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Multi-View Vehicle Re-Identification using Temporal Attention Model and Metadata Re-ranking.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019
Multi-Camera Tracking of Vehicles based on Deep Features Re-ID and Trajectory-Based Camera Link Models.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019
2018
Proceedings of the 2018 ACM Multimedia Conference on Multimedia Conference, 2018
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Proceedings of the 12th ACM International Conference on Distributed and Event-based Systems, 2018
2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs.
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Proceedings of the 2nd ICPR Workshop on Computer Vision for Analysis of Underwater Imagery, 2016
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
On fast timing closure: speeding up incremental path-based timing analysis with mapreduce.
Proceedings of the 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction, 2015
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
2013
A Reliability-Oriented Placement Algorithm for Reconfigurable Digital Microfluidic Biochips Using 3-D Deferred Decision Making Technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
2012
Proceedings of the International Symposium on Physical Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
A Two-Stage Integer Linear Programming-Based Droplet Routing Algorithm for Pin-Constrained Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Recent research and emerging challenges in design and optimization for digital microfluidic biochips.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011
Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Progressive network-flow based power-aware broadcast addressing for pin-constrained digital microfluidic biochips.
Proceedings of the 48th Design Automation Conference, 2011
2010
A Contamination Aware Droplet Routing Algorithm for the Synthesis of Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
A two-stage ILP-based droplet routing algorithm for pin-constrained digital microfluidic biochips.
Proceedings of the 2010 International Symposium on Physical Design, 2010
A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
2009
A fast routability- and performance-driven droplet routing algorithm for digital microfluidic biochips.
Proceedings of the 27th International Conference on Computer Design, 2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009