Jiafei Yao
Orcid: 0000-0002-1469-0677
According to our database1,
Jiafei Yao
authored at least 8 papers
between 2023 and 2025.
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Bibliography
2025
Efficient Automatic Design of IGBT Structural Parameters Using Differential Evolution and Machine Learning Model.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2025
Self-adaptive body bias tuning technique for enhancing Baliga's figure-of-merit (BFOM) in thin bulk silicon LDMOS.
Microelectron. J., 2025
A novel double-trench SiC SBD-embedded MOSFET with improved figure-of-merit and short-circuit ruggedness.
Microelectron. J., 2025
A cross-scale investigation on transient electrothermal performance for power MOSFETs at device-package level.
Microelectron. J., 2025
2024
Performance enhancement of 4H-SiC superjunction trench MOSFET with extended high-K dielectric.
Microelectron. J., 2024
General neural network-based static performance prediction model construction techniques for gate-all-around and planar field effect transistor.
Microelectron. J., 2024
Step thickness drift region automatic design of SOI LDMOS using physics-inspired constrained simulated annealing algorithm.
Microelectron. J., 2024
2023
Tradeoff Between the Breakdown Voltage and Specific On-Resistance of SOI RESURF LDMOS.
Proceedings of the 15th IEEE International Conference on ASIC, 2023